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Searched refs:mmDIG2_TMDS_CTL0_1_GEN_CNTL (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h2725 #define mmDIG2_TMDS_CTL0_1_GEN_CNTL 0x4286 macro
H A Ddce_8_0_d.h3474 #define mmDIG2_TMDS_CTL0_1_GEN_CNTL 0x4286 macro
H A Ddce_10_0_d.h4253 #define mmDIG2_TMDS_CTL0_1_GEN_CNTL 0x4c75 macro
H A Ddce_11_0_d.h4200 #define mmDIG2_TMDS_CTL0_1_GEN_CNTL 0x4c75 macro
H A Ddce_11_2_d.h5431 #define mmDIG2_TMDS_CTL0_1_GEN_CNTL 0x4c75 macro
H A Ddce_12_0_offset.h10752 #define mmDIG2_TMDS_CTL0_1_GEN_CNTL … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h8945 #define mmDIG2_TMDS_CTL0_1_GEN_CNTL … macro