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Searched refs:mmDIG4_AFMT_RAMP_CONTROL0 (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h2855 #define mmDIG4_AFMT_RAMP_CONTROL0 0x4844 macro
H A Ddce_8_0_d.h3292 #define mmDIG4_AFMT_RAMP_CONTROL0 0x4844 macro
H A Ddce_10_0_d.h4071 #define mmDIG4_AFMT_RAMP_CONTROL0 0x4e3b macro
H A Ddce_11_0_d.h3962 #define mmDIG4_AFMT_RAMP_CONTROL0 0x4e3b macro
H A Ddce_11_2_d.h5193 #define mmDIG4_AFMT_RAMP_CONTROL0 0x4e3b macro
H A Ddce_12_0_offset.h11278 #define mmDIG4_AFMT_RAMP_CONTROL0 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h9523 #define mmDIG4_AFMT_RAMP_CONTROL0 macro