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Searched refs:mmDP4_DP_DPHY_PRBS_CNTL (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3333 #define mmDP4_DP_DPHY_PRBS_CNTL 0x48D4 macro
H A Ddce_8_0_d.h3920 #define mmDP4_DP_DPHY_PRBS_CNTL 0x48d4 macro
H A Ddce_10_0_d.h4552 #define mmDP4_DP_DPHY_PRBS_CNTL 0x4eb5 macro
H A Ddce_11_0_d.h4542 #define mmDP4_DP_DPHY_PRBS_CNTL 0x4eb5 macro
H A Ddce_11_2_d.h5774 #define mmDP4_DP_DPHY_PRBS_CNTL 0x4eb5 macro
H A Ddce_12_0_offset.h11374 #define mmDP4_DP_DPHY_PRBS_CNTL … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h9621 #define mmDP4_DP_DPHY_PRBS_CNTL … macro