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Searched refs:mmINTERRUPT_CNTL2 (Results 1 – 12 of 12) sorted by relevance

/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dnbio_v6_1.c136 WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL2, adev->dummy_page_addr >> 8); in nbio_v6_1_ih_control()
H A Dnbio_v7_0.c227 WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL2, adev->dummy_page_addr >> 8); in nbio_v7_0_ih_control()
H A Dcz_ih.c114 WREG32(mmINTERRUPT_CNTL2, adev->dummy_page_addr >> 8); in cz_ih_irq_init()
H A Diceland_ih.c114 WREG32(mmINTERRUPT_CNTL2, adev->dummy_page_addr >> 8); in iceland_ih_irq_init()
H A Dtonga_ih.c110 WREG32(mmINTERRUPT_CNTL2, adev->dummy_page_addr >> 8); in tonga_ih_irq_init()
/dragonfly/sys/dev/drm/amd/include/asic_reg/bif/
H A Dbif_3_0_d.h634 #define mmINTERRUPT_CNTL2 0x151B macro
H A Dbif_4_1_d.h45 #define mmINTERRUPT_CNTL2 0x151b macro
H A Dbif_5_0_d.h53 #define mmINTERRUPT_CNTL2 0x151b macro
H A Dbif_5_1_d.h46 #define mmINTERRUPT_CNTL2 0x151b macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/nbif/
H A Dnbif_6_1_offset.h813 #define mmINTERRUPT_CNTL2 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/nbio/
H A Dnbio_6_1_offset.h2460 #define mmINTERRUPT_CNTL2 macro
H A Dnbio_7_0_offset.h4344 #define mmINTERRUPT_CNTL2 macro