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Searched refs:mmMC_VM_AGP_BASE (Results 1 – 15 of 15) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gmc/
H A Dgmc_7_0_d.h244 #define mmMC_VM_AGP_BASE 0x80c macro
H A Dgmc_8_2_d.h281 #define mmMC_VM_AGP_BASE 0x80c macro
H A Dgmc_6_0_d.h1020 #define mmMC_VM_AGP_BASE 0x080C macro
H A Dgmc_7_1_d.h275 #define mmMC_VM_AGP_BASE 0x80c macro
H A Dgmc_8_1_d.h284 #define mmMC_VM_AGP_BASE 0x80c macro
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dgfxhub_v1_0.c75 WREG32_SOC15(GC, 0, mmMC_VM_AGP_BASE, 0); in gfxhub_v1_0_init_system_aperture_regs()
H A Dmmhub_v1_0.c86 WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BASE, 0); in mmhub_v1_0_init_system_aperture_regs()
H A Dgmc_v7_0.c292 WREG32(mmMC_VM_AGP_BASE, 0); in gmc_v7_0_mc_program()
H A Dgmc_v8_0.c494 WREG32(mmMC_VM_AGP_BASE, 0); in gmc_v8_0_mc_program()
/dragonfly/sys/dev/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_1_0_offset.h1940 #define mmMC_VM_AGP_BASE … macro
H A Dmmhub_9_1_offset.h1972 #define mmMC_VM_AGP_BASE … macro
H A Dmmhub_9_3_0_offset.h1964 #define mmMC_VM_AGP_BASE … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h1662 #define mmMC_VM_AGP_BASE … macro
H A Dgc_9_1_offset.h1706 #define mmMC_VM_AGP_BASE … macro
H A Dgc_9_2_1_offset.h1648 #define mmMC_VM_AGP_BASE … macro