Home
last modified time | relevance | path

Searched refs:mmSCL2_SCL_AUTOMATIC_MODE_CONTROL (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h4171 #define mmSCL2_SCL_AUTOMATIC_MODE_CONTROL 0x4147 macro
H A Ddce_8_0_d.h4870 #define mmSCL2_SCL_AUTOMATIC_MODE_CONTROL 0x4147 macro
H A Ddce_10_0_d.h5586 #define mmSCL2_SCL_AUTOMATIC_MODE_CONTROL 0x1f47 macro
H A Ddce_11_0_d.h5644 #define mmSCL2_SCL_AUTOMATIC_MODE_CONTROL 0x1f47 macro
H A Ddce_11_2_d.h6971 #define mmSCL2_SCL_AUTOMATIC_MODE_CONTROL 0x1f47 macro
H A Ddce_12_0_offset.h5544 #define mmSCL2_SCL_AUTOMATIC_MODE_CONTROL … macro