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Searched refs:pixel_rate (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/display/dc/calcs/
H A Ddce_calcs.c252 data->pixel_rate[0] = data->pixel_rate[4]; in calculate_bandwidth()
253 data->pixel_rate[1] = data->pixel_rate[4]; in calculate_bandwidth()
255 data->pixel_rate[2] = data->pixel_rate[5]; in calculate_bandwidth()
256 data->pixel_rate[3] = data->pixel_rate[5]; in calculate_bandwidth()
383 data->pixel_rate[maximum_number_of_surfaces - 2] = data->pixel_rate[5]; in calculate_bandwidth()
384 data->pixel_rate[maximum_number_of_surfaces - 1] = data->pixel_rate[5]; in calculate_bandwidth()
1180 …i] = bw_div(bw_div(data->source_width_rounded_up_to_chunks[i], data->hsr[i]), data->pixel_rate[i]); in calculate_bandwidth()
2009 …t(bw_mul(bw_div(bw_min2(bw_int_to_fixed(600), data->max_phyclk), data->pixel_rate[k]), bw_int_to_f… in calculate_bandwidth()
2011 …(bw_mul(bw_div(bw_mul(bw_int_to_fixed(270), bw_int_to_fixed(4)), data->pixel_rate[k]), bw_int_to_f… in calculate_bandwidth()
2795 data->pixel_rate[num_displays + 4] = bw_frc_to_fixed(pipe[i].stream->timing.pix_clk_khz, 1000); in populate_initial_data()
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H A Dcalcs_logger.h422 DC_LOG_BANDWIDTH_CALCS(" [bw_fixed] pixel_rate[%d]:%d", i, bw_fixed_to_int(data->pixel_rate[i])); in print_bw_calcs_data()
/dragonfly/sys/dev/drm/i915/
H A Dintel_cdclk.c1748 int pixel_rate) in intel_pixel_rate_to_cdclk() argument
1756 return pixel_rate; in intel_pixel_rate_to_cdclk()
1764 return DIV_ROUND_UP(pixel_rate * 100, 2 * 99); in intel_pixel_rate_to_cdclk()
1767 return pixel_rate; in intel_pixel_rate_to_cdclk()
1769 return DIV_ROUND_UP(pixel_rate * 100, 95); in intel_pixel_rate_to_cdclk()
1771 return DIV_ROUND_UP(pixel_rate * 100, 90); in intel_pixel_rate_to_cdclk()
1783 min_cdclk = intel_pixel_rate_to_cdclk(dev_priv, crtc_state->pixel_rate); in intel_crtc_compute_min_cdclk()
H A Dintel_pm.c674 ret = (uint64_t) pixel_rate * cpp * latency; in intel_wm_method1()
762 entries = intel_wm_method1(pixel_rate, cpp, in intel_calculate_wm()
1568 ret = intel_wm_method2(pixel_rate, htotal, in vlv_wm_method2()
2429 ret = intel_wm_method2(pixel_rate, htotal, in ilk_wm_method2()
2482 method2 = ilk_wm_method2(cstate->pixel_rate, in ilk_compute_pri_wm()
2529 return ilk_wm_method2(cstate->pixel_rate, in ilk_compute_cur_wm()
4319 wm_intermediate_val = latency * pixel_rate; in skl_wm_method2()
4329 uint32_t pixel_rate; in intel_get_linetime_us() local
4336 pixel_rate = cstate->pixel_rate; in intel_get_linetime_us()
4338 if (WARN_ON(pixel_rate == 0)) in intel_get_linetime_us()
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H A Dintel_fbc.c749 cache->crtc.hsw_bdw_pixel_rate = crtc_state->pixel_rate; in intel_fbc_update_state_cache()
H A Dintel_display.c6202 return pipe_config->pixel_rate <= in pipe_config_supports_ips()
6228 uint32_t pixel_rate; in ilk_pipe_pixel_rate() local
6230 pixel_rate = pipe_config->base.adjusted_mode.crtc_clock; in ilk_pipe_pixel_rate()
6252 return pixel_rate; in ilk_pipe_pixel_rate()
6254 pixel_rate = div_u64((uint64_t) pixel_rate * pipe_w * pipe_h, in ilk_pipe_pixel_rate()
6258 return pixel_rate; in ilk_pipe_pixel_rate()
6267 crtc_state->pixel_rate = in intel_crtc_compute_pixel_rate()
6270 crtc_state->pixel_rate = in intel_crtc_compute_pixel_rate()
10688 pipe_config->pixel_rate); in intel_dump_pipe_config()
11276 PIPE_CONF_CHECK_CLOCK_FUZZY(pixel_rate); in intel_pipe_config_compare()
H A Dintel_drv.h638 unsigned int pixel_rate; member
/dragonfly/sys/dev/drm/amd/display/dc/inc/
H A Ddce_calcs.h390 struct bw_fixed pixel_rate[maximum_number_of_surfaces]; member