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Searched refs:vce (Results 1 – 20 of 20) sorted by relevance

/dragonfly/sys/dev/drm/amd/amdgpu/
H A Damdgpu_vce.c166 adev->vce.fw = NULL; in amdgpu_vce_sw_init()
183 (u64 *)&adev->vce.gpu_addr, &adev->vce.cpu_addr); in amdgpu_vce_sw_init()
191 adev->vce.filp[i] = NULL; in amdgpu_vce_sw_init()
211 if (adev->vce.vcpu_bo == NULL) in amdgpu_vce_sw_fini()
216 amdgpu_bo_free_kernel(&adev->vce.vcpu_bo, (u64 *)&adev->vce.gpu_addr, in amdgpu_vce_sw_fini()
217 (void **)&adev->vce.cpu_addr); in amdgpu_vce_sw_fini()
222 release_firmware(adev->vce.fw); in amdgpu_vce_sw_fini()
240 ring = &adev->vce.ring[0]; in amdgpu_vce_entity_init()
263 if (adev->vce.vcpu_bo == NULL) in amdgpu_vce_suspend()
290 if (adev->vce.vcpu_bo == NULL) in amdgpu_vce_resume()
[all …]
H A Dvce_v4_0.c180 adev->vce.ring[0].wptr = 0; in vce_v4_0_mmsch_start()
232 ring = &adev->vce.ring[0]; in vce_v4_0_sriov_start()
335 ring = &adev->vce.ring[0]; in vce_v4_0_start()
343 ring = &adev->vce.ring[1]; in vce_v4_0_start()
351 ring = &adev->vce.ring[2]; in vce_v4_0_start()
408 adev->vce.num_rings = 1; in vce_v4_0_early_init()
410 adev->vce.num_rings = 3; in vce_v4_0_early_init()
443 if (!adev->vce.saved_bo) in vce_v4_0_sw_init()
459 ring = &adev->vce.ring[i]; in vce_v4_0_sw_init()
500 adev->vce.saved_bo = NULL; in vce_v4_0_sw_fini()
[all …]
H A Dvce_v3_0.c281 ring = &adev->vce.ring[0]; in vce_v3_0_start()
288 ring = &adev->vce.ring[1]; in vce_v3_0_start()
295 ring = &adev->vce.ring[2]; in vce_v3_0_start()
406 if ((adev->vce.harvest_config & in vce_v3_0_early_init()
411 adev->vce.num_rings = 3; in vce_v3_0_early_init()
437 adev->vce.num_rings = 2; in vce_v3_0_sw_init()
444 ring = &adev->vce.ring[i]; in vce_v3_0_sw_init()
646 adev->vce.srbm_soft_reset = 0; in vce_v3_0_check_soft_reset()
950 adev->vce.ring[i].me = i; in vce_v3_0_set_ring_funcs()
956 adev->vce.ring[i].me = i; in vce_v3_0_set_ring_funcs()
[all …]
H A Damdgpu_queue_mgr.c83 *out_ring = &adev->vce.ring[ring]; in amdgpu_identity_map()
252 ip_num_rings = adev->vce.num_rings; in amdgpu_queue_mgr_map()
H A Damdgpu_kms.c168 fw_info->ver = adev->vce.fw_version; in amdgpu_firmware_info()
169 fw_info->feature = adev->vce.fb_version; in amdgpu_firmware_info()
339 for (i = 0; i < adev->vce.num_rings; i++) in amdgpu_info_ioctl()
340 ring_mask |= adev->vce.ring[i].ready << i; in amdgpu_info_ioctl()
606 if (adev->vce.fw_version < AMDGPU_VCE_FW_53_45) in amdgpu_info_ioctl()
629 dev_info.vce_harvest_config = adev->vce.harvest_config; in amdgpu_info_ioctl()
H A Duvd_v6_0.c319 r = amdgpu_job_submit(job, &ring->adev->vce.entity, in uvd_v6_0_enc_get_destroy_msg()
H A Damdgpu.h1512 struct amdgpu_vce vce; member
H A Duvd_v7_0.c328 r = amdgpu_job_submit(job, &ring->adev->vce.entity, in uvd_v7_0_enc_get_destroy_msg()
/dragonfly/sys/dev/drm/radeon/
H A Dradeon_vce.c144 &rdev->vce.vcpu_bo); in radeon_vce_init()
158 &rdev->vce.gpu_addr); in radeon_vce_init()
168 rdev->vce.filp[i] = NULL; in radeon_vce_init()
183 if (rdev->vce.vcpu_bo == NULL) in radeon_vce_fini()
186 radeon_bo_unref(&rdev->vce.vcpu_bo); in radeon_vce_fini()
201 if (rdev->vce.vcpu_bo == NULL) in radeon_vce_suspend()
226 if (rdev->vce.vcpu_bo == NULL) in radeon_vce_resume()
248 radeon_bo_kunmap(rdev->vce.vcpu_bo); in radeon_vce_resume()
331 rdev->vce.filp[i] = NULL; in radeon_vce_free_handles()
540 p->rdev->vce.filp[i] = p->filp; in radeon_vce_validate_handle()
[all …]
H A Dvce_v1_0.c206 rdev->vce.keyselect = le32_to_cpu(sign->val[i].keyselect); in vce_v1_0_load_fw()
219 uint64_t addr = rdev->vce.gpu_addr; in vce_v1_0_resume()
255 WREG32(VCE_LMI_FW_START_KEYSEL, rdev->vce.keyselect); in vce_v1_0_resume()
H A Dvce_v2_0.c159 uint64_t addr = rdev->vce.gpu_addr; in vce_v2_0_resume()
H A Dradeon_drv.c326 MODULE_PARM_DESC(vce, "vce enable/disable vce support (1 = enable, 0 = disable)");
327 module_param_named(vce, radeon_vce, int, 0444);
H A Dradeon_kms.c566 *value = rdev->vce.fw_version; in radeon_info_ioctl()
569 *value = rdev->vce.fb_version; in radeon_info_ioctl()
H A Dradeon.h2395 struct radeon_vce vce; member
/dragonfly/sys/dev/drm/amd/powerplay/hwmgr/
H A Dsmu10_hwmgr.h111 uint32_t vce : 1; member
H A Dsmu8_hwmgr.h134 uint32_t vce : 1; member
/dragonfly/contrib/gcc-8.0/gcc/
H A Dipa-param-manipulation.c702 tree vce = build1 (VIEW_CONVERT_EXPR, TREE_TYPE (*expr), src); in ipa_modify_expr() local
703 *expr = vce; in ipa_modify_expr()
H A Domp-simd-clone.c893 tree vce = build1 (VIEW_CONVERT_EXPR, TREE_TYPE (*tp), repl); in ipa_simd_modify_stmt_ops() local
894 *tp = vce; in ipa_simd_modify_stmt_ops()
H A Dipa-prop.c4862 bool by_ref, vce; in before_dom_children() local
4870 vce = false; in before_dom_children()
4878 vce = true; in before_dom_children()
4883 if (vce) in before_dom_children()
/dragonfly/contrib/gcc-4.7/gcc/
H A Dtree-sra.c4428 tree vce = build1 (VIEW_CONVERT_EXPR, TREE_TYPE (*expr), src); in sra_ipa_modify_expr() local
4429 *expr = vce; in sra_ipa_modify_expr()