| /dragonfly/sys/dev/drm/ |
| H A D | drm_modes.c | 328 drm_mode->vtotal *= 2; in drm_cvt_mode()
513 drm_mode->vtotal = vtotal_lines; in drm_gtf_mode_complex()
518 drm_mode->vtotal *= 2; in drm_gtf_mode_complex()
778 int vtotal; in drm_mode_vrefresh() local
779 vtotal = mode->vtotal; in drm_mode_vrefresh()
783 refresh = (calc_val + vtotal / 2) / vtotal; in drm_mode_vrefresh()
845 p->crtc_vtotal = p->vtotal; in drm_mode_set_crtcinfo()
1013 mode1->vtotal == mode2->vtotal && in drm_mode_equal_no_clocks_no_stereo()
1048 mode->vtotal < mode->vsync_end) in drm_mode_validate_basic()
1544 out->vtotal = in->vtotal; in drm_mode_convert_to_umode()
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| H A D | drm_edid.c | 2180 mode->vtotal *= 2; in drm_mode_do_interlace_quirk()
2181 mode->vtotal |= 1; in drm_mode_do_interlace_quirk()
2258 mode->vtotal = mode->vdisplay + vblank; in drm_mode_detailed()
2263 if (mode->vsync_end > mode->vtotal) in drm_mode_detailed()
2264 mode->vtotal = mode->vsync_end + 1; in drm_mode_detailed()
2895 edid_cea_modes[9].vtotal != 262 || in cea_mode_alternate_timings()
2896 edid_cea_modes[12].vtotal != 262 || in cea_mode_alternate_timings()
2897 edid_cea_modes[13].vtotal != 262 || in cea_mode_alternate_timings()
2901 edid_cea_modes[28].vtotal != 312); in cea_mode_alternate_timings()
2909 mode->vtotal++; in cea_mode_alternate_timings()
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| /dragonfly/sys/dev/drm/i915/ |
| H A D | dvo_ns2501.c | 216 uint16_t vtotal; /* number of lines generated, 82/83 */ member
243 .vtotal = 1341,
263 .vtotal = 1341,
282 .vtotal = 1341,
531 mode->hdisplay, mode->htotal, mode->vdisplay, mode->vtotal); in ns2501_mode_valid()
558 mode->hdisplay, mode->htotal, mode->vdisplay, mode->vtotal); in ns2501_mode_set()
626 ns2501_writeb(dvo, NS2501_REG82, conf->vtotal & 0xff); in ns2501_mode_set()
627 ns2501_writeb(dvo, NS2501_REG83, conf->vtotal >> 8); in ns2501_mode_set()
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| H A D | intel_crt.c | 617 uint32_t vtotal, vactive; in intel_crt_load_detect() local
639 vtotal = ((save_vtotal >> 16) & 0xfff) + 1; in intel_crt_load_detect()
669 if (vblank_start <= vactive && vblank_end >= vtotal) { in intel_crt_load_detect()
680 if (vblank_start - vactive >= vtotal - vblank_end) in intel_crt_load_detect()
683 vsample = (vtotal + vblank_end) >> 1; in intel_crt_load_detect()
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| H A D | i915_irq.c | 805 u32 vtotal = mode->crtc_vtotal; in __intel_get_crtc_scanline_from_timestamp() local
835 scanline = min(scanline, vtotal - 1); in __intel_get_crtc_scanline_from_timestamp()
849 int position, vtotal; in __intel_get_crtc_scanline() local
860 vtotal = mode->crtc_vtotal; in __intel_get_crtc_scanline()
862 vtotal /= 2; in __intel_get_crtc_scanline()
921 vtotal = mode->crtc_vtotal; in i915_get_crtc_scanoutpos()
928 vtotal /= 2; in i915_get_crtc_scanoutpos()
959 vtotal *= htotal; in i915_get_crtc_scanoutpos()
970 if (position >= vtotal) in i915_get_crtc_scanoutpos()
971 position = vtotal - 1; in i915_get_crtc_scanoutpos()
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| H A D | intel_tv.c | 1122 .vtotal = 1104,
1386 mode_ptr->vtotal = vactive_s + 33; in intel_tv_get_modes()
1388 tmp = mul_u32_u32(tv_mode->refresh, mode_ptr->vtotal); in intel_tv_get_modes()
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| H A D | intel_bios.c | 129 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay + in fill_detail_timing_data()
152 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) in fill_detail_timing_data()
153 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1; in fill_detail_timing_data()
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| H A D | intel_dsi_vbt.c | 554 pclk += DIV_ROUND_UP(mode->vtotal * in intel_dsi_vbt_init()
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| H A D | intel_sdvo.c | 824 v_blank_len = mode->vtotal - mode->vdisplay; in intel_sdvo_get_dtd_from_mode()
885 mode.vtotal = mode.vdisplay + dtd->part1.v_blank; in intel_sdvo_get_mode_from_dtd()
886 mode.vtotal += (dtd->part1.v_high & 0xf) << 8; in intel_sdvo_get_mode_from_dtd()
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| H A D | intel_panel.c | 84 scan->vtotal == fixed_mode->vtotal) { in intel_find_panel_downclock()
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| H A D | intel_display.c | 7073 mode->vtotal = pipe_config->base.adjusted_mode.crtc_vtotal; in intel_mode_from_pipe_config()
11758 int vtotal; in update_scanline_offset() local
11760 vtotal = adjusted_mode->crtc_vtotal; in update_scanline_offset()
11762 vtotal /= 2; in update_scanline_offset()
11764 crtc->scanline_offset = vtotal - 1; in update_scanline_offset()
15373 u32 vtotal; member
15452 error->transcoder[i].vtotal = I915_READ(VTOTAL(cpu_transcoder)); in intel_display_capture_error_state()
15512 err_printf(m, " VTOTAL: %08x\n", error->transcoder[i].vtotal); in intel_display_print_error_state()
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| /dragonfly/sys/dev/drm/include/drm/ |
| H A D | drm_modes.h | 141 .vsync_start = (vss), .vsync_end = (vse), .vtotal = (vt), \
285 int vtotal; member
426 (m)->vdisplay, (m)->vsync_start, (m)->vsync_end, (m)->vtotal, \
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| /dragonfly/sys/dev/drm/amd/display/modules/freesync/ |
| H A D | freesync.c | 427 uint32_t vtotal = stream->timing.v_total; in calc_freesync_range() local
438 state->freesync_range.vmax = vtotal; in calc_freesync_range()
439 state->freesync_range.vmin = vtotal; in calc_freesync_range()
465 if (state->freesync_range.vmin < vtotal) { in calc_freesync_range()
467 ASSERT((state->freesync_range.vmin + 1) >= vtotal); in calc_freesync_range()
468 state->freesync_range.vmin = vtotal; in calc_freesync_range()
471 if (state->freesync_range.vmax < vtotal) { in calc_freesync_range()
473 ASSERT((state->freesync_range.vmax + 1) >= vtotal); in calc_freesync_range()
474 state->freesync_range.vmax = vtotal; in calc_freesync_range()
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| /dragonfly/sys/dev/drm/amd/amdgpu/ |
| H A D | amdgpu_encoders.c | 153 unsigned vblank = native_mode->vtotal - native_mode->vdisplay; in amdgpu_panel_mode_fixup()
169 adjusted_mode->vtotal = native_mode->vdisplay + vblank; in amdgpu_panel_mode_fixup()
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| H A D | amdgpu_display.c | 781 int vbl_start, vbl_end, vtotal, ret = 0; in amdgpu_display_get_crtc_scanoutpos() local
860 vtotal = mode->crtc_vtotal; in amdgpu_display_get_crtc_scanoutpos()
861 *vpos = *vpos - vtotal; in amdgpu_display_get_crtc_scanoutpos()
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| /dragonfly/sys/dev/drm/radeon/ |
| H A D | radeon_encoders.c | 320 unsigned vblank = native_mode->vtotal - native_mode->vdisplay; in radeon_panel_mode_fixup()
338 adjusted_mode->vtotal = native_mode->vdisplay + vblank; in radeon_panel_mode_fixup()
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| H A D | radeon_display.c | 1836 int vbl_start, vbl_end, vtotal, ret = 0; in radeon_get_crtc_scanoutpos() local
1994 vtotal = mode->crtc_vtotal; in radeon_get_crtc_scanoutpos()
1995 *vpos = *vpos - vtotal; in radeon_get_crtc_scanoutpos()
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| H A D | rs780_dpm.c | 65 if (crtc->mode.htotal && crtc->mode.vtotal) in rs780_get_pm_mode_parameters()
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| /dragonfly/sys/dev/drm/amd/display/dc/dml/ |
| H A D | display_mode_structs.h | 294 unsigned int vtotal; member
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| /dragonfly/sys/dev/drm/amd/display/dc/calcs/ |
| H A D | dcn_calcs.c | 414 input->dest.vtotal = pipe->stream->timing.v_total; in pipe_ctx_to_e2e_pipe_params()
415 input->dest.vblank_start = input->dest.vtotal - pipe->stream->timing.v_front_porch; in pipe_ctx_to_e2e_pipe_params()
843 v->vtotal[input_idx] = pipe->stream->timing.v_total; in dcn_validate_bandwidth()
1098 pipe->pipe_dlg_param.vtotal = pipe->stream->timing.v_total; in dcn_validate_bandwidth()
1139 hsplit_pipe->pipe_dlg_param.vtotal = pipe->stream->timing.v_total; in dcn_validate_bandwidth()
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| H A D | dcn_calc_auto.c | 795 v->maximum_vstartup = v->vtotal[k] - v->vactive[k] - 1.0; in mode_support_and_system_configuration()
1335 v->frame_time_for_min_full_det_buffering_time = v->vtotal[k] * v->htotal[k] / v->pixel_clock[k]; in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
1339 v->frame_time_for_min_full_det_buffering_time = v->vtotal[k] * v->htotal[k] / v->pixel_clock[k]; in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
1368 v->v_blank_time = (v->vtotal[k] - v->vactive[k]) * v->htotal[k] / v->pixel_clock[k]; in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
1601 v->max_vstartup_lines[k] = v->vtotal[k] - v->vactive[k] - 1.0; in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
1853 …v->v_blank_dram_clock_change_latency_margin[k] = (v->vtotal[k] - v->scaler_recout_height[k]) * (v-… in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
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| /dragonfly/sys/dev/drm/include/uapi/drm/ |
| H A D | drm_mode.h | 239 __u16 vtotal; member
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| /dragonfly/sys/dev/video/bktr/ |
| H A D | bktr_reg.h | 407 int vtotal, vdelay, vactive; member
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| /dragonfly/sys/dev/drm/amd/display/dc/inc/ |
| H A D | dcn_calcs.h | 177 float vtotal[number_of_planes_minus_one + 1]; member
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| /dragonfly/sys/dev/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm.c | 374 if (max_size < mode->htotal * mode->vtotal) in amdgpu_dm_fbc_init()
375 max_size = mode->htotal * mode->vtotal; in amdgpu_dm_fbc_init()
2495 native_mode->vtotal == drm_mode->vtotal) { in decide_crtc_timing_for_drm_display_mode()
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