/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIMachineFunctionInfo.cpp | 76 ArgInfo.PrivateSegmentBuffer = in SIMachineFunctionInfo() 93 ArgInfo.PrivateSegmentBuffer = in SIMachineFunctionInfo() 150 ArgInfo.PrivateSegmentWaveByteOffset = in SIMachineFunctionInfo() 190 ArgInfo.PrivateSegmentBuffer = in addPrivateSegmentBuffer() 201 return ArgInfo.DispatchPtr.getRegister(); in addDispatchPtr() 208 return ArgInfo.QueuePtr.getRegister(); in addQueuePtr() 212 ArgInfo.KernargSegmentPtr in addKernargSegmentPtr() 216 return ArgInfo.KernargSegmentPtr.getRegister(); in addKernargSegmentPtr() 223 return ArgInfo.DispatchID.getRegister(); in addDispatchID() 230 return ArgInfo.FlatScratchInit.getRegister(); in addFlatScratchInit() [all …]
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H A D | AMDGPUCallLowering.h | 30 void lowerParameter(MachineIRBuilder &B, ArgInfo &AI, uint64_t Offset, 62 SmallVectorImpl<ArgInfo> &InArgs) const; 66 SmallVectorImpl<ArgInfo> &OutArgs) const; 72 SmallVectorImpl<ArgInfo> &InArgs, 73 SmallVectorImpl<ArgInfo> &OutArgs) const; 82 SmallVectorImpl<ArgInfo> &OutArgs) const;
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H A D | SIMachineFunctionInfo.h | 281 std::optional<SIArgumentInfo> ArgInfo; 400 AMDGPUFunctionArgInfo ArgInfo; 757 return ArgInfo.WorkGroupIDX.getRegister(); 782 ArgInfo.WorkItemIDX = Arg; 786 ArgInfo.WorkItemIDY = Arg; 790 ArgInfo.WorkItemIDZ = Arg; 794 ArgInfo.PrivateSegmentWaveByteOffset 841 return ArgInfo; 845 return ArgInfo; 850 return ArgInfo.getPreloadedValue(Value); [all …]
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H A D | AMDGPUTargetMachine.cpp | 1620 if (YamlMFI.ArgInfo && in parseMachineFunctionInfo() 1624 parseAndCheckArgument(YamlMFI.ArgInfo->DispatchPtr, in parseMachineFunctionInfo() 1628 MFI->ArgInfo.QueuePtr, 2, 0) || in parseMachineFunctionInfo() 1632 parseAndCheckArgument(YamlMFI.ArgInfo->DispatchID, in parseMachineFunctionInfo() 1641 parseAndCheckArgument(YamlMFI.ArgInfo->LDSKernelId, in parseMachineFunctionInfo() 1644 parseAndCheckArgument(YamlMFI.ArgInfo->WorkGroupIDX, in parseMachineFunctionInfo() 1647 parseAndCheckArgument(YamlMFI.ArgInfo->WorkGroupIDY, in parseMachineFunctionInfo() 1650 parseAndCheckArgument(YamlMFI.ArgInfo->WorkGroupIDZ, in parseMachineFunctionInfo() 1665 parseAndCheckArgument(YamlMFI.ArgInfo->WorkItemIDX, in parseMachineFunctionInfo() 1668 parseAndCheckArgument(YamlMFI.ArgInfo->WorkItemIDY, in parseMachineFunctionInfo() [all …]
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H A D | AMDGPUCallLowering.cpp | 321 SmallVector<ArgInfo, 8> SplitRetInfos; in lowerReturnVal() 424 SmallVector<ArgInfo, 32> SplitArgs; in lowerParameter() 429 for (ArgInfo &SplitArg : SplitArgs) { in lowerParameter() 620 SmallVector<ArgInfo, 32> SplitArgs; in lowerFormalArguments() 1097 SmallVectorImpl<ArgInfo> &InArgs, SmallVectorImpl<ArgInfo> &OutArgs) const { in isEligibleForTailCallOptimization() 1342 ArgInfo Callee = Info.OrigArgs[0]; in lowerChainCall() 1343 ArgInfo SGPRArgs = Info.OrigArgs[2]; in lowerChainCall() 1345 ArgInfo Flags = Info.OrigArgs[4]; in lowerChainCall() 1378 SmallVector<ArgInfo, 8> OutArgs; in lowerChainCall() 1409 SmallVector<ArgInfo, 8> OutArgs; in lowerCall() [all …]
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H A D | AMDGPUArgumentUsageInfo.h | 189 void setFuncArgInfo(const Function &F, const AMDGPUFunctionArgInfo &ArgInfo) { in setFuncArgInfo() argument 190 ArgInfoMap[&F] = ArgInfo; in setFuncArgInfo()
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | CallLowering.h | 62 struct ArgInfo : public BaseArgInfo { struct 81 ArgInfo(ArrayRef<Register> Regs, Type *Ty, unsigned OrigIndex, argument 99 ArgInfo() = default; 111 ArgInfo OrigRet; 114 SmallVector<ArgInfo, 32> OrigArgs; 368 void setArgFlags(ArgInfo &Arg, unsigned OpIdx, const DataLayout &DL, 377 void splitToValueTypes(const ArgInfo &OrigArgInfo, 378 SmallVectorImpl<ArgInfo> &SplitArgs, 394 SmallVectorImpl<ArgInfo> &Args, 403 SmallVectorImpl<ArgInfo> &Args, MachineIRBuilder &MIRBuilder, [all …]
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H A D | LegalizerHelper.h | 432 const CallLowering::ArgInfo &Result, 433 ArrayRef<CallLowering::ArgInfo> Args, CallingConv::ID CC, 439 const CallLowering::ArgInfo &Result, 440 ArrayRef<CallLowering::ArgInfo> Args,
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64CallLowering.h | 55 SmallVectorImpl<ArgInfo> &InArgs, 56 SmallVectorImpl<ArgInfo> &OutArgs) const; 74 SmallVectorImpl<ArgInfo> &OutArgs) const; 79 SmallVectorImpl<ArgInfo> &InArgs) const; 83 SmallVectorImpl<ArgInfo> &OutArgs) const;
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H A D | AArch64CallLowering.cpp | 379 SmallVector<ArgInfo, 8> SplitArgs; in lowerReturn() 384 ArgInfo CurArgInfo = ArgInfo{CurVReg, SplitEVTs[i].getTypeForEVT(Ctx), 0}; in lowerReturn() 654 SmallVector<ArgInfo, 8> SplitArgs; in lowerFormalArguments() 667 ArgInfo OrigArg{VRegs[i], Arg, i}; in lowerFormalArguments() 803 SmallVectorImpl<ArgInfo> &InArgs) const { in doCallerAndCalleePassArgsTheSameWay() 869 SmallVector<ArgInfo, 8> OutArgs; in areCalleeOutgoingArgsTailCallable() 913 SmallVectorImpl<ArgInfo> &InArgs, in isEligibleForTailCallOptimization() 914 SmallVectorImpl<ArgInfo> &OutArgs) const { in isEligibleForTailCallOptimization() 1231 SmallVector<ArgInfo, 8> OutArgs; in lowerCall() 1237 ArgInfo &OutArg = OutArgs.back(); in lowerCall() [all …]
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/freebsd/contrib/llvm-project/llvm/include/llvm/Transforms/Utils/ |
H A D | SCCPSolver.h | 41 struct ArgInfo { struct 45 ArgInfo(Argument *F, Constant *A) : Formal(F), Actual(A) {} in ArgInfo() function 47 bool operator==(const ArgInfo &Other) const { 51 bool operator!=(const ArgInfo &Other) const { return !(*this == Other); } 53 friend hash_code hash_value(const ArgInfo &A) { in hash_value() argument 174 const SmallVectorImpl<ArgInfo> &Args);
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/freebsd/contrib/llvm-project/clang/include/clang/CodeGen/ |
H A D | CGFunctionInfo.h | 555 typedef CGFunctionInfoArgInfo ArgInfo; typedef 611 ArgInfo *getArgsBuffer() { in getArgsBuffer() 612 return getTrailingObjects<ArgInfo>(); in getArgsBuffer() 614 const ArgInfo *getArgsBuffer() const { in getArgsBuffer() 615 return getTrailingObjects<ArgInfo>(); in getArgsBuffer() 645 typedef const ArgInfo *const_arg_iterator; 646 typedef ArgInfo *arg_iterator; 648 MutableArrayRef<ArgInfo> arguments() { in arguments() 649 return MutableArrayRef<ArgInfo>(arg_begin(), NumArgs); in arguments() 651 ArrayRef<ArgInfo> arguments() const { in arguments() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsCallLowering.cpp | 43 const CallLowering::ArgInfo &Info, ISD::ArgFlagsTy Flags, in assignArg() 71 const CallLowering::ArgInfo &Info, ISD::ArgFlagsTy Flags, in assignArg() 105 unsigned assignCustomValue(CallLowering::ArgInfo &Arg, 167 MipsIncomingValueHandler::assignCustomValue(CallLowering::ArgInfo &Arg, in assignCustomValue() 212 unsigned assignCustomValue(CallLowering::ArgInfo &Arg, 259 MipsOutgoingValueHandler::assignCustomValue(CallLowering::ArgInfo &Arg, in assignCustomValue() 330 SmallVector<ArgInfo, 8> RetInfos; in lowerReturn() 332 ArgInfo ArgRetInfo(VRegs, *Val, 0); in lowerReturn() 376 SmallVector<ArgInfo, 8> ArgInfos; in lowerFormalArguments() 379 ArgInfo AInfo(VRegs[i], Arg, i); in lowerFormalArguments() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | CallLowering.cpp | 160 Info.OrigRet = ArgInfo{ResRegs, RetTy, 0, getAttributesForReturn(CB)}; in lowerCall() 257 void CallLowering::splitToValueTypes(const ArgInfo &OrigArg, in splitToValueTypes() 607 SmallVectorImpl<ArgInfo> &Args, MachineIRBuilder &MIRBuilder, in determineAndHandleAssignments() 692 SmallVectorImpl<ArgInfo> &Args, in handleAssignments() 952 ArgInfo::NoArgIndex); in insertSRetIncomingArgument() 970 ArgInfo DemoteArg(DemoteReg, PointerType::get(RetTy, AS), in insertSRetOutgoingArgument() 971 ArgInfo::NoArgIndex); in insertSRetOutgoingArgument() 1028 const SmallVectorImpl<ArgInfo> &OutArgs) const { in parametersInCSRMatch() 1046 const ArgInfo &OutInfo = OutArgs[i]; in parametersInCSRMatch() 1079 SmallVectorImpl<ArgInfo> &InArgs, in resultsCompatible() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/GISel/ |
H A D | M68kCallLowering.cpp | 108 SmallVector<ArgInfo, 8> SplitArgs; in lowerReturn() 109 ArgInfo OrigArg{VRegs, Val->getType(), 0}; in lowerReturn() 131 SmallVector<ArgInfo, 8> SplitArgs; in lowerFormalArguments() 134 ArgInfo OrigArg{VRegs[I], Arg.getType(), I}; in lowerFormalArguments() 200 SmallVector<ArgInfo, 8> OutArgs; in lowerCall() 204 SmallVector<ArgInfo, 8> InArgs; in lowerCall()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
H A D | PPCCallLowering.cpp | 86 ArgInfo OrigArg{VRegs, Val->getType(), 0}; in lowerReturn() 90 SmallVector<ArgInfo, 8> SplitArgs; in lowerReturn() 124 SmallVector<ArgInfo, 8> SplitArgs; in lowerFormalArguments() 130 ArgInfo OrigArg{VRegs[I], Arg, I}; in lowerFormalArguments()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
H A D | RISCVCallLowering.cpp | 45 const CallLowering::ArgInfo &Info, ISD::ArgFlagsTy Flags, in assignArg() 111 unsigned assignCustomValue(CallLowering::ArgInfo &Arg, in assignCustomValue() 183 const CallLowering::ArgInfo &Info, ISD::ArgFlagsTy Flags, in assignArg() 234 unsigned assignCustomValue(CallLowering::ArgInfo &Arg, in assignCustomValue() 399 ArgInfo OrigRetInfo(VRegs, Val->getType(), 0); in lowerReturnVal() 402 SmallVector<ArgInfo, 4> SplitRetInfos; in lowerReturnVal() 515 SmallVector<ArgInfo, 32> SplitArgInfos; in lowerFormalArguments() 519 ArgInfo AInfo(VRegs[Index], Arg.getType(), Index); in lowerFormalArguments() 568 SmallVector<ArgInfo, 32> SplitArgInfos; in lowerCall() 619 SmallVector<ArgInfo, 4> SplitRetInfos; in lowerCall()
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/freebsd/contrib/llvm-project/clang/lib/CodeGen/Targets/ |
H A D | Mips.cpp | 218 ABIArgInfo ArgInfo = in classifyArgumentType() local 221 ArgInfo.setInReg(true); in classifyArgumentType() 222 return ArgInfo; in classifyArgumentType() 306 ABIArgInfo ArgInfo = in classifyReturnType() local 308 ArgInfo.setInReg(true); in classifyReturnType() 309 return ArgInfo; in classifyReturnType()
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H A D | CSKY.cpp | 55 for (auto &ArgInfo : FI.arguments()) { in computeInfo() local 56 ArgInfo.info = classifyArgumentType(ArgInfo.type, ArgGPRsLeft, ArgFPRsLeft); in computeInfo()
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H A D | LoongArch.cpp | 93 for (auto &ArgInfo : FI.arguments()) { in computeInfo() local 94 ArgInfo.info = classifyArgumentType( in computeInfo() 95 ArgInfo.type, /*IsFixed=*/ArgNum < NumFixedArgs, GARsLeft, FARsLeft); in computeInfo()
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H A D | RISCV.cpp | 96 for (auto &ArgInfo : FI.arguments()) { in computeInfo() local 98 ArgInfo.info = in computeInfo() 99 classifyArgumentType(ArgInfo.type, IsFixed, ArgGPRsLeft, ArgFPRsLeft); in computeInfo()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
H A D | X86CallLowering.cpp | 70 const CallLowering::ArgInfo &Info, ISD::ArgFlagsTy Flags, in assignArg() 161 ArgInfo OrigRetInfo(VRegs, Val->getType(), 0); in lowerReturn() 164 SmallVector<ArgInfo, 4> SplitRetInfos; in lowerReturn() 262 SmallVector<ArgInfo, 8> SplitArgs; in lowerFormalArguments() 282 ArgInfo OrigArg(VRegs[Idx], Arg.getType(), Idx); in lowerFormalArguments() 336 SmallVector<ArgInfo, 8> SplitArgs; in lowerCall()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMCallLowering.cpp | 134 unsigned assignCustomValue(CallLowering::ArgInfo &Arg, in assignCustomValue() 198 ArgInfo OrigRetInfo(VRegs, Val->getType(), 0); in lowerReturnVal() 201 SmallVector<ArgInfo, 4> SplitRetInfos; in lowerReturnVal() 310 unsigned assignCustomValue(ARMCallLowering::ArgInfo &Arg, in assignCustomValue() 399 SmallVector<ArgInfo, 8> SplitArgInfos; in lowerFormalArguments() 402 ArgInfo OrigArgInfo(VRegs[Idx], Arg.getType(), Idx); in lowerFormalArguments() 495 SmallVector<ArgInfo, 8> ArgInfos; in lowerCall()
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/freebsd/contrib/llvm-project/llvm/lib/IR/ |
H A D | Function.cpp | 1200 unsigned ArgInfo = (NextElt == Infos.size() ? 0 : Infos[NextElt++]); in DecodeIITType() local 1205 unsigned ArgInfo = (NextElt == Infos.size() ? 0 : Infos[NextElt++]); in DecodeIITType() local 1207 ArgInfo)); in DecodeIITType() 1211 unsigned ArgInfo = (NextElt == Infos.size() ? 0 : Infos[NextElt++]); in DecodeIITType() local 1213 ArgInfo)); in DecodeIITType() 1219 ArgInfo)); in DecodeIITType() 1225 ArgInfo)); in DecodeIITType() 1255 ArgInfo)); in DecodeIITType() 1261 ArgInfo)); in DecodeIITType() 1267 ArgInfo)); in DecodeIITType() [all …]
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/freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
H A D | CGCall.cpp | 1458 SmallVector<IRArgs, 8> ArgInfo; member in __anon8a34942c0511::ClangToLLVMArgMapping 1483 assert(ArgNo < ArgInfo.size()); in hasPaddingArg() 1494 assert(ArgNo < ArgInfo.size()); in getIRArgs() 1524 auto &IRArgs = ArgInfo[ArgNo]; in construct() 1568 assert(ArgNo == ArgInfo.size()); in construct() 1693 ArgInfo.getPaddingType(); in GetFunctionType() 1698 switch (ArgInfo.getKind()) { in GetFunctionType() 1721 if (st && ArgInfo.isDirect() && ArgInfo.getCanBeFlattened()) { in GetFunctionType() 5089 switch (ArgInfo.getKind()) { in EmitCall() 5182 ArgInfo.isIndirectAliased() || ArgInfo.getIndirectByVal(); in EmitCall() [all …]
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