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Searched refs:CPUID (Results 1 – 25 of 27) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCInstrAnalysis.h138 unsigned CPUID) const { in isZeroIdiom() argument
163 unsigned CPUID) const { in isDependencyBreaking() argument
164 return isZeroIdiom(MI, Mask, CPUID); in isDependencyBreaking()
174 unsigned CPUID) const { in isOptimizableRegisterMove() argument
H A DMCSubtargetInfo.h223 unsigned CPUID) const { in resolveVariantSchedClass() argument
/freebsd/contrib/llvm-project/llvm/lib/MC/
H A DMCSchedule.cpp77 unsigned CPUID = getProcessorID(); in computeInstrLatency() local
79 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, &MCII, CPUID); in computeInstrLatency()
123 unsigned CPUID = getProcessorID(); in getReciprocalThroughput() local
125 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, &MCII, CPUID); in getReciprocalThroughput()
/freebsd/lib/libpmc/pmu-events/
H A DREADME108 CPUID,Version,Dir/path/name,Type
124 CPUID:
125 CPUID is an arch-specific char string, that can be used
131 CPUID == 'GenuineIntel-6-2E' (on x86).
132 CPUID == '004b0100' (PVR value in Powerpc)
/freebsd/crypto/openssl/crypto/
H A Dbuild.info62 # CPUID support. We need to add that explicitly in every shared library and
63 # provider module that uses it. ctype.c is included here because the CPUID
72 # We only need to include the CPUID stuff in the legacy provider when it's a
81 # Implementations are now spread across several libraries, so the CPUID define
/freebsd/contrib/llvm-project/llvm/tools/llvm-mca/Views/
H A DInstructionInfoView.cpp127 unsigned CPUID = SM.getProcessorID(); in collectData() local
132 STI.resolveVariantSchedClass(SchedClassID, &Inst, &MCII, CPUID); in collectData()
/freebsd/crypto/openssl/doc/man3/
H A DOPENSSL_ia32cap.pod15 by processor in EDX:ECX register pair after executing CPUID instruction
80 variable" terms. The truth is that it's not copied from CPUID output
87 CPUID with EAX=7 and ECX=0 as input. Following bits are significant:
/freebsd/contrib/llvm-project/llvm/lib/MCA/
H A DInstrBuilder.cpp530 unsigned CPUID = SM.getProcessorID(); in createInstrDescImpl() local
533 STI.resolveVariantSchedClass(SchedClassID, &MCI, &MCII, CPUID); in createInstrDescImpl()
612 unsigned CPUID = STI.getSchedModel().getProcessorID(); in getOrCreateInstrDesc() local
613 SchedClassID = STI.resolveVariantSchedClass(SchedClassID, &MCI, &MCII, CPUID); in getOrCreateInstrDesc()
/freebsd/sys/amd64/amd64/
H A Dapic_vector.S230 movl PCPU(CPUID), %eax
/freebsd/sys/i386/i386/
H A Dswtch.S74 movl PCPU(CPUID), %esi
164 movl PCPU(CPUID),%esi
H A Dapic_vector.S326 movl PCPU(CPUID), %eax
/freebsd/contrib/llvm-project/llvm/include/llvm/BinaryFormat/
H A DMinidump.h150 support::ulittle32_t CPUID; member
/freebsd/contrib/llvm-project/compiler-rt/lib/builtins/cpu_model/aarch64/fmv/
H A Dmrs.inc178 // Set some features in case of no CPUID support
/freebsd/contrib/llvm-project/openmp/runtime/src/
H A Dz_Windows_NT-586_asm.asm90 cpuid ; Query the CPUID for the current processor
650 cpuid ; Query the CPUID for the current processor
/freebsd/contrib/llvm-project/llvm/lib/ObjectYAML/
H A DMinidumpYAML.cpp165 mapRequiredHex(IO, "CPUID", Info.CPUID); in mapping()
/freebsd/sys/contrib/device-tree/Bindings/arm/
H A Dcpus.yaml52 required and matches the CPUID[11:0] register bits.
/freebsd/sys/x86/conf/
H A DNOTES611 # CPU control pseudo-device. Provides access to MSRs, CPUID info and
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ScheduleAtom.td880 def : InstRW<[AtomWrite01_121], (instrs CPUID)>;
H A DX86InstrSystem.td477 def CPUID : I<0xA2, RawFrm, (outs), (ins), "cpuid", []>, TB;
H A DX86SchedBroadwell.td1333 def: InstRW<[BWWriteResGroup159], (instrs CPUID)>;
H A DX86SchedSkylakeClient.td1410 def: InstRW<[SKLWriteResGroup184], (instrs CPUID, RDTSC)>;
H A DX86SchedHaswell.td1576 def: InstRW<[HWWriteResGroup149], (instrs CPUID, RDTSC)>;
H A DX86SchedAlderlakeP.td777 def : InstRW<[ADLPWriteResGroup34], (instrs CPUID)>;
H A DX86SchedSkylakeServer.td2079 def: InstRW<[SKXWriteResGroup207], (instrs CPUID, RDTSC)>;
H A DX86SchedIceLake.td2098 def: InstRW<[ICXWriteResGroup207], (instrs CPUID, RDTSC)>;

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