/freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
H A D | ConstrainedOps.def | 94 DAG_FUNCTION(round, 1, 0, experimental_constrained_round, FROUND)
|
H A D | VPIntrinsics.def | 413 VP_PROPERTY_FUNCTIONAL_SDOPC(FROUND)
|
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 954 FROUND, enumerator
|
H A D | BasicTTIImpl.h | 1947 ISD = ISD::FROUND; in getTypeBasedIntrinsicInstrCost()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 786 setOperationAction(ISD::FROUND, MVT::f16, Promote); in NVPTXTargetLowering() 787 setOperationAction(ISD::FROUND, MVT::v2f16, Expand); in NVPTXTargetLowering() 788 setOperationAction(ISD::FROUND, MVT::v2bf16, Expand); in NVPTXTargetLowering() 789 setOperationAction(ISD::FROUND, MVT::f32, Custom); in NVPTXTargetLowering() 790 setOperationAction(ISD::FROUND, MVT::f64, Custom); in NVPTXTargetLowering() 791 setOperationAction(ISD::FROUND, MVT::bf16, Promote); in NVPTXTargetLowering() 792 AddPromotedToType(ISD::FROUND, MVT::bf16, MVT::f32); in NVPTXTargetLowering() 2709 case ISD::FROUND: in LowerOperation()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.h | 122 FROUND, enumerator
|
H A D | RISCVInstrInfoF.td | 39 : SDNode<"RISCVISD::FROUND", SDT_RISCVFROUND>;
|
H A D | RISCVISelLowering.cpp | 438 ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FRINT, ISD::FROUND, in RISCVTargetLowering() 452 ISD::FTRUNC, ISD::FRINT, ISD::FROUND, in RISCVTargetLowering() 917 ISD::FFLOOR, ISD::FROUND, ISD::FROUNDEVEN, ISD::FRINT, in RISCVTargetLowering() 951 setOperationAction({ISD::FTRUNC, ISD::FCEIL, ISD::FFLOOR, ISD::FROUND, in RISCVTargetLowering() 1299 setOperationAction({ISD::FTRUNC, ISD::FCEIL, ISD::FFLOOR, ISD::FROUND, in RISCVTargetLowering() 2852 case ISD::FROUND: in matchRoundingOp() 2932 case ISD::FROUND: in lowerVectorFTRUNC_FCEIL_FFLOOR_FROUND() 3101 return DAG.getNode(RISCVISD::FROUND, DL, VT, Src, MaxValNode, in lowerFTRUNC_FCEIL_FFLOOR_FROUND() 6356 case ISD::FROUND: in LowerOperation() 18839 NODE_NAME_CASE(FROUND) in getTargetNodeName()
|
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGDumper.cpp | 219 case ISD::FROUND: return "fround"; in getOperationName()
|
H A D | LegalizeFloatTypes.cpp | 126 case ISD::FROUND: R = SoftenFloatRes_FROUND(N); break; in SoftenFloatResult() 1347 case ISD::FROUND: ExpandFloatRes_FROUND(N, Lo, Hi); break; in ExpandFloatResult() 2415 case ISD::FROUND: in PromoteFloatResult() 2824 case ISD::FROUND: in SoftPromoteHalfResult()
|
H A D | LegalizeVectorOps.cpp | 410 case ISD::FROUND: in LegalizeOp()
|
H A D | LegalizeVectorTypes.cpp | 106 case ISD::FROUND: in ScalarizeVectorResult() 1106 case ISD::FROUND: in SplitVectorResult() 4281 case ISD::FROUND: in WidenVectorResult()
|
H A D | LegalizeDAG.cpp | 4501 case ISD::FROUND: in ConvertNodeToLibcall() 5358 case ISD::FROUND: in PromoteNode()
|
H A D | SelectionDAGBuilder.cpp | 6498 case Intrinsic::round: Opcode = ISD::FROUND; break; in visitIntrinsicCall() 8876 if (visitUnaryFloatCall(I, ISD::FROUND)) in visitCall()
|
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | TargetLoweringBase.cpp | 878 setOperationAction({ISD::FROUND, ISD::FPOWI, ISD::FLDEXP, ISD::FFREXP}, VT, in initActions()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 453 setOperationAction(ISD::FROUND, MVT::f64, Legal); in PPCTargetLowering() 458 setOperationAction(ISD::FROUND, MVT::f32, Legal); in PPCTargetLowering() 1021 setOperationAction(ISD::FROUND, MVT::v2f64, Legal); in PPCTargetLowering() 1022 setOperationAction(ISD::FROUND, MVT::f64, Legal); in PPCTargetLowering() 1027 setOperationAction(ISD::FROUND, MVT::v4f32, Legal); in PPCTargetLowering() 1028 setOperationAction(ISD::FROUND, MVT::f32, Legal); in PPCTargetLowering() 1229 setOperationAction(ISD::FROUND, MVT::f128, Legal); in PPCTargetLowering()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 702 ISD::FRINT, ISD::FROUND, ISD::FROUNDEVEN, in AArch64TargetLowering() 728 setOperationAction(ISD::FROUND, MVT::v4f16, Expand); in AArch64TargetLowering() 753 setOperationAction(ISD::FROUND, MVT::v8f16, Expand); in AArch64TargetLowering() 769 ISD::FRINT, ISD::FTRUNC, ISD::FROUND, in AArch64TargetLowering() 1085 ISD::FRINT, ISD::FROUND, ISD::FROUNDEVEN, in AArch64TargetLowering() 1242 ISD::FROUND, ISD::FROUNDEVEN, ISD::STRICT_FFLOOR, in AArch64TargetLowering() 1473 setOperationAction(ISD::FROUND, VT, Custom); in AArch64TargetLowering() 1890 setOperationAction(ISD::FROUND, VT, Custom); in addTypeForFixedLengthSVE() 6185 case ISD::FROUND: in LowerOperation()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 510 setOperationAction(ISD::FROUND, VT, Legal); in SystemZTargetLowering() 570 setOperationAction(ISD::FROUND, MVT::v2f64, Legal); in SystemZTargetLowering() 611 setOperationAction(ISD::FROUND, MVT::v4f32, Legal); in SystemZTargetLowering()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelDAGToDAG.cpp | 168 case ISD::FROUND: in fp16SrcZerosHighBits()
|
H A D | AMDGPUISelLowering.cpp | 348 setOperationAction(ISD::FROUND, {MVT::f32, MVT::f64}, Custom); in AMDGPUTargetLowering() 1347 case ISD::FROUND: return LowerFROUND(Op, DAG); in LowerOperation()
|
H A D | SIISelLowering.cpp | 215 ISD::FROUND, ISD::FROUNDEVEN, ISD::FFLOOR, ISD::FCANONICALIZE, in SITargetLowering() 599 ISD::FSIN, ISD::FROUND, ISD::FPTRUNC_ROUND}, in SITargetLowering()
|
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
H A D | TargetSelectionDAG.td | 522 def fround : SDNode<"ISD::FROUND" , SDTFPUnaryOp>;
|
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsSEISelLowering.cpp | 153 setOperationAction(ISD::FROUND, MVT::f16, Promote); in MipsSETargetLowering()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 1637 ISD::FRINT, ISD::FNEARBYINT, ISD::FROUND, ISD::FFLOOR, in HexagonTargetLowering()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 356 setOperationAction(ISD::FROUND, VT, Legal); in addMVEVectorTypes() 1512 setOperationAction(ISD::FROUND, MVT::f32, Legal); in ARMTargetLowering() 1528 setOperationAction(ISD::FROUND, MVT::f64, Legal); in ARMTargetLowering() 1553 setOperationAction(ISD::FROUND, MVT::f16, Legal); in ARMTargetLowering()
|