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Searched refs:GPR (Results 1 – 25 of 206) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoZb.td519 def : Pat<(XLenVT (and GPR:$rs1, (not GPR:$rs2))), (ANDN GPR:$rs1, GPR:$rs2)>;
520 def : Pat<(XLenVT (or GPR:$rs1, (not GPR:$rs2))), (ORN GPR:$rs1, GPR:$rs2)>;
521 def : Pat<(XLenVT (xor GPR:$rs1, (not GPR:$rs2))), (XNOR GPR:$rs1, GPR:$rs2)>;
725 (SH1ADD (SH2ADD GPR:$r, GPR:$r), GPR:$r)>;
727 (SH1ADD (SH3ADD GPR:$r, GPR:$r), GPR:$r)>;
741 (SH1ADD (SH3ADD GPR:$r, GPR:$r), (SH3ADD GPR:$r, GPR:$r))>;
743 (SH2ADD (SH3ADD GPR:$r, GPR:$r), (SH3ADD GPR:$r, GPR:$r))>;
745 (SH3ADD (SH3ADD GPR:$r, GPR:$r), (SH3ADD GPR:$r, GPR:$r))>;
843 def : Pat<(i32 (and GPR:$rs1, (not GPR:$rs2))), (ANDN GPR:$rs1, GPR:$rs2)>;
844 def : Pat<(i32 (or GPR:$rs1, (not GPR:$rs2))), (ORN GPR:$rs1, GPR:$rs2)>;
[all …]
H A DRISCVGISel.td93 def : Pat<(i32 (shl GPR:$rs1, (i32 GPR:$rs2))), (SLLW GPR:$rs1, GPR:$rs2)>;
94 def : Pat<(i32 (sra GPR:$rs1, (i32 GPR:$rs2))), (SRAW GPR:$rs1, GPR:$rs2)>;
95 def : Pat<(i32 (srl GPR:$rs1, (i32 GPR:$rs2))), (SRLW GPR:$rs1, GPR:$rs2)>;
105 (SLTU GPR:$rs1, GPR:$rs2)>;
109 (SLT GPR:$rs1, GPR:$rs2)>;
118 (SLTIU (XOR GPR:$rs1, GPR:$rs2), 1)>;
128 (SLTU GPR:$rs2, GPR:$rs1)>;
132 (SLT GPR:$rs2, GPR:$rs1)>;
136 (XORI (SLTU GPR:$rs1, GPR:$rs2), 1)>;
140 (XORI (SLT GPR:$rs1, GPR:$rs2), 1)>;
[all …]
H A DRISCVInstrInfoZa.td58 defm AMOCAS_W : AMO_cas_aq_rl<0b00101, 0b010, "amocas.w", GPR>;
76 (!cast<RVInst>(BaseInst) GPR:$cmp, GPR:$addr, GPR:$new)>;
80 (!cast<RVInst>(BaseInst#"_AQ") GPR:$cmp, GPR:$addr, GPR:$new)>;
84 (!cast<RVInst>(BaseInst#"_RL") GPR:$cmp, GPR:$addr, GPR:$new)>;
88 (!cast<RVInst>(BaseInst#"_AQ_RL") GPR:$cmp, GPR:$addr, GPR:$new)>;
92 (!cast<RVInst>(BaseInst#"_AQ_RL") GPR:$cmp, GPR:$addr, GPR:$new)>;
98 (!cast<RVInst>(BaseInst) GPR:$cmp, GPR:$addr, GPR:$new)>;
102 (!cast<RVInst>(BaseInst) GPR:$cmp, GPR:$addr, GPR:$new)>;
106 (!cast<RVInst>(BaseInst) GPR:$cmp, GPR:$addr, GPR:$new)>;
110 (!cast<RVInst>(BaseInst) GPR:$cmp, GPR:$addr, GPR:$new)>;
[all …]
H A DRISCVInstrInfoXTHead.td123 (ins GPR:$rd, GPR:$rs1, GPR:$rs2),
132 (ins GPR:$rd, GPR:$rs1, GPR:$rs2),
648 (TH_MVEQZ GPR:$a, GPR:$b, GPR:$cond)>;
655 (TH_MVNEZ GPR:$a, GPR:$b, GPR:$cond)>;
657 (TH_MVEQZ GPR:$a, GPR:$b, GPR:$cond)>;
670 (TH_MULA GPR:$rd, GPR:$rs1, GPR:$rs2)>;
672 (TH_MULS GPR:$rd, GPR:$rs1, GPR:$rs2)>;
678 (TH_MULAW GPR:$rd, GPR:$rs1, GPR:$rs2)>;
680 (TH_MULSW GPR:$rd, GPR:$rs1, GPR:$rs2)>;
685 (TH_MULAH GPR:$rd, GPR:$rs1, GPR:$rs2)>;
[all …]
H A DRISCVInstrInfoA.td191 : Pseudo<(outs GPR:$res, GPR:$scratch1, GPR:$scratch2),
202 : Pseudo<(outs GPR:$res, GPR:$scratch1, GPR:$scratch2),
216 : Pat<(intrin GPR:$addr, GPR:$incr, GPR:$mask, GPR:$shiftamt,
218 (AMOInst GPR:$addr, GPR:$incr, GPR:$mask, GPR:$shiftamt,
325 (CmpXchgInst GPR:$addr, GPR:$cmp, GPR:$new, 2)>;
349 (ins GPR:$addr, GPR:$cmpval, GPR:$newval, GPR:$mask,
359 GPR:$addr, GPR:$cmpval, GPR:$newval, GPR:$mask, timm:$ordering),
361 GPR:$addr, GPR:$cmpval, GPR:$newval, GPR:$mask, timm:$ordering)>;
366 GPR:$addr, GPR:$cmpval, GPR:$newval, GPR:$mask, timm:$ordering),
368 GPR:$addr, GPR:$cmpval, GPR:$newval, GPR:$mask, timm:$ordering)>;
[all …]
H A DRISCVInstrInfoXVentana.td21 (ins GPR:$rs1, GPR:$rs2), opcodestr,
32 def : Pat<(i64 (riscv_czero_eqz GPR:$rs1, GPR:$rc)),
33 (VT_MASKC GPR:$rs1, GPR:$rc)>;
34 def : Pat<(i64 (riscv_czero_nez GPR:$rs1, GPR:$rc)),
35 (VT_MASKCN GPR:$rs1, GPR:$rc)>;
37 def : Pat<(i64 (riscv_czero_eqz GPR:$rs1, (riscv_setne (i64 GPR:$rc)))),
38 (VT_MASKC GPR:$rs1, GPR:$rc)>;
39 def : Pat<(i64 (riscv_czero_eqz GPR:$rs1, (riscv_seteq (i64 GPR:$rc)))),
40 (VT_MASKCN GPR:$rs1, GPR:$rc)>;
42 (VT_MASKCN GPR:$rs1, GPR:$rc)>;
[all …]
H A DRISCVInstrInfoZicond.td37 def : Pat<(XLenVT (riscv_czero_eqz GPR:$rs1, GPR:$rc)),
38 (CZERO_EQZ GPR:$rs1, GPR:$rc)>;
39 def : Pat<(XLenVT (riscv_czero_nez GPR:$rs1, GPR:$rc)),
40 (CZERO_NEZ GPR:$rs1, GPR:$rc)>;
42 def : Pat<(XLenVT (riscv_czero_eqz GPR:$rs1, (riscv_setne (XLenVT GPR:$rc)))),
43 (CZERO_EQZ GPR:$rs1, GPR:$rc)>;
44 def : Pat<(XLenVT (riscv_czero_eqz GPR:$rs1, (riscv_seteq (XLenVT GPR:$rc)))),
45 (CZERO_NEZ GPR:$rs1, GPR:$rc)>;
46 def : Pat<(XLenVT (riscv_czero_nez GPR:$rs1, (riscv_setne (XLenVT GPR:$rc)))),
47 (CZERO_NEZ GPR:$rs1, GPR:$rc)>;
[all …]
H A DRISCVInstrInfo.td1172 : Pat<(vt1 (OpNode (vt1 GPR:$rs1), (vt2 GPR:$rs2))), (Inst GPR:$rs1, GPR:$rs2)>;
1400 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>,
1405 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>,
1410 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>,
1415 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>,
1420 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>,
1425 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>,
1430 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>,
1435 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>,
1478 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>,
[all …]
H A DRISCVInstrInfoXCV.td58 (ins GPR:$rd, GPR:$rs1, GPR:$rs2),
74 (outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2),
92 (ins GPR:$rd, GPR:$rs1, GPR:$rs2, uimm5:$imm5), opcodestr>;
153 (CV_MULSN GPR:$rd1, GPR:$rs1, GPR:$rs2, 0)>;
155 (CV_MULHHSN GPR:$rd1, GPR:$rs1, GPR:$rs2, 0)>;
159 (CV_MULUN GPR:$rd1, GPR:$rs1, GPR:$rs2, 0)>;
161 (CV_MULHHUN GPR:$rd1, GPR:$rs1, GPR:$rs2, 0)>;
626 (outs GPR:$rs1_wb), (ins GPR:$rs2, GPR:$rs1, GPR:$rs3),
629 (outs GPR:$rs1_wb), (ins GPR:$rs2, GPR:$rs1, GPR:$rs3),
632 (outs GPR:$rs1_wb), (ins GPR:$rs2, GPR:$rs1, GPR:$rs3),
[all …]
H A DRISCVInstrInfoD.td488 : Pseudo<(outs FPR64:$dst), (ins GPR:$src1, GPR:$src2),
494 : Pseudo<(outs GPR:$dst1, GPR:$dst2), (ins FPR64:$src),
495 [(set GPR:$dst1, GPR:$dst2, (RISCVSplitF64 FPR64:$src))]>;
533 : Pseudo<(outs FPR64IN32X:$dst), (ins GPR:$src1, GPR:$src2),
539 : Pseudo<(outs GPR:$dst1, GPR:$dst2), (ins FPR64IN32X:$src),
560 def : Pat<(any_sint_to_fp (i32 GPR:$rs1)), (FCVT_D_W GPR:$rs1, FRM_RNE)>;
561 def : Pat<(any_uint_to_fp (i32 GPR:$rs1)), (FCVT_D_WU GPR:$rs1, FRM_RNE)>;
588 def : Pat<(bitconvert (i64 GPR:$rs1)), (FMV_D_X GPR:$rs1)>;
618 def : Pat<(any_sint_to_fp (i64 GPR:$rs1)), (FCVT_D_L GPR:$rs1, FRM_DYN)>;
625 def : Pat<(f64 (bitconvert (i64 GPR:$rs1))), (COPY_TO_REGCLASS GPR:$rs1, GPR)>;
[all …]
H A DRISCVInstrInfoM.td95 def : Pat<(and (riscv_divuw (assertzexti32 GPR:$rs1),
96 (assertzexti32 GPR:$rs2)), 0xffffffff),
97 (DIVU GPR:$rs1, GPR:$rs2)>;
98 def : Pat<(and (riscv_remuw (assertzexti32 GPR:$rs1),
99 (assertzexti32 GPR:$rs2)), 0xffffffff),
100 (REMU GPR:$rs1, GPR:$rs2)>;
105 def : Pat<(srem (sexti32 (i64 GPR:$rs1)), (sexti32 (i64 GPR:$rs2))),
106 (REMW GPR:$rs1, GPR:$rs2)>;
114 def : Pat<(i64 (mul (and GPR:$rs1, 0xffffffff), (and GPR:$rs2, 0xffffffff))),
115 (MULHU (SLLI GPR:$rs1, 32), (SLLI GPR:$rs2, 32))>;
H A DRISCVInstrInfoF.td271 : RVInstR<funct7, funct3, OPC_OP_FP, (outs GPR:$rd),
409 (FLT_S GPR:$rd, FPR32:$rt, FPR32:$rs), 0>;
417 def : InstAlias<"fscsr $rd, $rs", (CSRRW GPR:$rd, SysRegFCSR.Encoding, GPR:$rs)>;
423 def : InstAlias<"fssr $rd, $rs", (CSRRW GPR:$rd, SysRegFCSR.Encoding, GPR:$rs), 0>;
427 def : InstAlias<"fsrm $rd, $rs", (CSRRW GPR:$rd, SysRegFRM.Encoding, GPR:$rs)>;
433 def : InstAlias<"fsflags $rd, $rs", (CSRRW GPR:$rd, SysRegFFLAGS.Encoding, GPR:$rs)>;
680 (SW (COPY_TO_REGCLASS FPR32INX:$rs2, GPR), GPR:$rs1, simm12:$imm12)>;
685 def : Pat<(bitconvert (i32 GPR:$rs1)), (FMV_W_X GPR:$rs1)>;
691 def : Pat<(f32 (bitconvert (i32 GPR:$rs1))), (COPY_TO_REGCLASS GPR:$rs1, GPRF32)>;
737 def : Pat<(riscv_fmv_w_x_rv64 GPR:$src), (FMV_W_X GPR:$src)>;
[all …]
H A DRISCVInstrInfoVVLPatterns.td1024 GPR:$rs2, (vti.Mask V0), GPR:$vl, vti.Log2SEW)>;
1031 GPR:$rs2, (vti.Mask V0), GPR:$vl, vti.Log2SEW)>;
1444 wti.RegClass:$rs2, GPR:$rs1, GPR:$vl, vti.Log2SEW, TA_MA)>;
1495 GPR:$vl, vti.Log2SEW,
1537 GPR:$vl, vti.Log2SEW,
1639 wti.RegClass:$rs2, GPR:$rs1, GPR:$vl, vti.Log2SEW, TA_MA)>;
1778 wti.RegClass:$rs1, GPR:$rs2, GPR:$vl, vti.Log2SEW, TA_MA)>;
2313 vti.RegClass:$passthru, GPR:$rs2, GPR:$vl, vti.Log2SEW, TU_MU)>;
2537 GPR:$vl, fvti.Log2SEW)>;
2579 $passthru, GPR:$imm, GPR:$vl, fvti.Log2SEW, TU_MU)>;
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrInfo.td1395 (DECT32 (CMPNE32 GPR:$rs1, GPR:$rs2), GPR:$false, GPR:$rx,
1398 (DECF32 (CMPNE32 GPR:$rs1, GPR:$rs2), GPR:$false, GPR:$rx,
1419 (dec0 (cmp GPR:$rs1, GPR:$rs2), GPR:$other, GPR:$rx,
1422 (dec1 (cmp GPR:$rs1, GPR:$rs2), GPR:$other, GPR:$rx,
1425 (dec0 (cmp GPR:$rs2, GPR:$rs1), GPR:$other, GPR:$rx,
1428 (dec1 (cmp GPR:$rs2, GPR:$rs1), GPR:$other, GPR:$rx,
1437 def : Pat<(select (i32 (setne GPR:$rs1, GPR:$rs2)), GPR:$rx, GPR:$false),
1438 (MOVT32 (CMPNE32 GPR:$rs1, GPR:$rs2), GPR:$rx, GPR:$false)>;
1439 def : Pat<(select (i32 (seteq GPR:$rs1, GPR:$rs2)), GPR:$rx, GPR:$false),
1440 (MOVF32 (CMPNE32 GPR:$rs1, GPR:$rs2), GPR:$rx, GPR:$false)>;
[all …]
H A DCSKYInstrInfoF2.td93 def FLDR_S : F2_LDSTR_S<0b0, "fldr", (outs FPR32Op:$rz), (ins GPR:$rx, GPR:$ry, uimm2:$imm)>;
95 def FLDR_D : F2_LDSTR_D<0b0, "fldr", (outs FPR64Op:$rz), (ins GPR:$rx, GPR:$ry, uimm2:$imm)>;
98 def FSTR_S : F2_LDSTR_S<0b1, "fstr", (outs), (ins FPR32Op:$rz, GPR:$rx, GPR:$ry, uimm2:$imm)>;
100 def FSTR_D : F2_LDSTR_D<0b1, "fstr", (outs), (ins FPR64Op:$rz, GPR:$rx, GPR:$ry, uimm2:$imm)>;
125 (outs GPR:$vrz), (ins FPR32Op:$vrx),
129 (outs GPR:$vrz, GPR:$vry), (ins FPR64Op:$vrx),
143 (outs GPR:$vrz, GPR:$vry), (ins FPR64Op:$vrx),
144 [(set GPR:$vrz, GPR:$vry, (CSKY_BITCAST_TO_LOHI FPR64Op:$vrx))]>;
153 (outs FPR32Op:$vrz), (ins GPR:$vrx, GPR:$vry),
166 (outs FPR64Op:$vrz), (ins GPR:$vrx, GPR:$vry),
[all …]
H A DCSKYInstrFormats.td81 (outs GPR:$rz), (ins GPR:$rx,ImmType:$imm16),
200 [(set GPR:$rz, (node GPR:$rx, ImmType:$imm12))]> {
246 (ins GPR:$rz, GPR:$rx, operand:$imm12), op, []>;
463 [(set GPR:$rz, (opnode GPR:$rx, type))]>;
467 [(set GPR:$rz, (and GPR:$rx, (i32 v)))]>;
533 // Input: GPR:rx, GPR:ry
539 (ins GPR:$rx, GPR:$ry), op, [(set GPR:$rz, (opnode GPR:$rx, GPR:$ry))]> {
562 (outs GPR:$rz), (ins GPR:$rx, GPR:$ry, uimm_shift:$imm), op, []>;
565 (outs), (ins GPR:$rz, GPR:$rx, GPR:$ry, uimm_shift:$imm), op, []>;
586 (ins GPR:$rx, GPR:$ry),
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchInstrInfo.td710 : Fmt3R<op, (outs GPR:$dst), (ins GPR:$rd, GPR:$rk, GPR:$rj),
1035 : Pat<(OpNode GPR:$rj, GPR:$rk), (Inst GPR:$rj, GPR:$rk)>;
1248 def : Pat<(not (or GPR:$rj, GPR:$rk)), (NOR GPR:$rj, GPR:$rk)>;
1249 def : Pat<(or GPR:$rj, (not GPR:$rk)), (ORN GPR:$rj, GPR:$rk)>;
1250 def : Pat<(and GPR:$rj, (not GPR:$rk)), (ANDN GPR:$rj, GPR:$rk)>;
1385 def : Pat<(setugt GPR:$rj, GPR:$rk), (SLTU GPR:$rk, GPR:$rj)>;
1388 def : Pat<(setgt GPR:$rj, GPR:$rk), (SLT GPR:$rk, GPR:$rj)>;
1389 def : Pat<(setge GPR:$rj, GPR:$rk), (XORI (SLT GPR:$rj, GPR:$rk), 1)>;
1949 (ins GPR:$addr, GPR:$cmpval, GPR:$newval, GPR:$mask,
1959 : Pat<(intrin GPR:$addr, GPR:$incr, GPR:$mask, GPR:$shiftamt,
[all …]
H A DLoongArchLBTInstrFormats.td28 : LAInst<(outs), (ins GPR:$rj),
39 : LAInst<(outs), (ins GPR:$rj, uimm3:$imm3),
52 : LAInst<(outs), (ins GPR:$rj, uimm4:$imm4),
65 : LAInst<(outs GPR:$rd), (ins uimm4:$imm4),
78 : LAInst<(outs), (ins GPR:$rj, uimm5:$imm5),
121 : LAInst<(outs), (ins GPR:$rj, uimm6:$imm6),
134 : LAInst<(outs GPR:$rd), (ins uimm8:$imm8),
147 : LAInst<(outs), (ins GPR:$rj, GPR:$rk),
160 : LAInst<(outs), (ins GPR:$rj, GPR:$rk, uimm4:$imm4),
175 : LAInst<(outs GPR:$rd), (ins GPR:$rj, uimm3:$imm3),
[all …]
H A DLoongArchLVZInstrInfo.td19 def GCSRRD : FmtCSR<0x05000000, (outs GPR:$rd), (ins uimm14:$csr_num),
23 def GCSRWR : FmtCSR<0x05000020, (outs GPR:$dst),
24 (ins GPR:$rd, uimm14:$csr_num), "$rd, $csr_num">;
25 def GCSRXCHG : FmtCSRXCHG<0x05000000, (outs GPR:$dst),
26 (ins GPR:$rd, GPR:$rj, uimm14:$csr_num),
H A DLoongArchFloat32InstrInfo.td100 def MOVGR2FCSR : FP_MOV<0x0114c000, FCSR, GPR>;
101 def MOVFCSR2GR : FP_MOV<0x0114c800, GPR, FCSR>;
105 def MOVGR2CF : FP_MOV<0x0114d800, CFR, GPR>;
106 def MOVCF2GR : FP_MOV<0x0114dc00, GPR, CFR>;
316 // GPR -> FPR
317 def : Pat<(loongarch_movgr2fr_w_la64 GPR:$src), (MOVGR2FR_W GPR:$src)>;
318 // FPR -> GPR
335 // GPR -> FPR
336 def : Pat<(bitconvert (i32 GPR:$src)), (MOVGR2FR_W GPR:$src)>;
337 // FPR -> GPR
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiInstrInfo.td293 def R : InstRR<subOp, (outs GPR:$Rd), (ins GPR:$Rs1, GPR:$Rs2, pred:$DDDI),
295 [(set GPR:$Rd, (OpNode GPR:$Rs1, GPR:$Rs2))]>;
306 def R : InstRR<subOp, (outs GPR:$Rd), (ins GPR:$Rs1, GPR:$Rs2, pred:$DDDI),
308 [(set GPR:$Rd, (OpNode GPR:$Rs1, GPR:$Rs2))]>;
395 def : Pat<(LanaiSubbF GPR:$Rs1, GPR:$Rs2),
396 (SUBB_F_R GPR:$Rs1, GPR:$Rs2)>;
443 : InstRR<0b111, (outs GPR:$Rd), (ins GPR:$Rs1, GPR:$Rs2, pred:$DDDI), AsmStr,
449 [(set GPR:$Rd, (shl GPR:$Rs1, GPR:$Rs2))]>;
470 def : Pat<(srl GPR:$Rs1, GPR:$Rs2),
471 (SRL_R GPR:$Rs1, (SUB_R R0, GPR:$Rs2))>;
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstrInfo.td3932 // GPR:$dst = GPR:$a op GPR:$b
4068 def USADA8 : AI<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm, GPR:$Ra),
4458 (SMLAL GPR:$RdLo, GPR:$RdHi, GPR:$Rn, GPR:$Rm, GPR:$RLo, GPR:$RHi,
4465 (UMLAL GPR:$RdLo, GPR:$RdHi, GPR:$Rn, GPR:$Rm, GPR:$RLo, GPR:$RHi,
4491 (ins GPR:$Rn, GPR:$Rm, GPR:$Ra),
4500 [(set GPR:$Rd, (ARMsmmlar GPR:$Rn, GPR:$Rm, GPR:$Ra))]>,
4513 [(set GPR:$Rd, (ARMsmmlsr GPR:$Rn, GPR:$Rm, GPR:$Ra))]>,
4626 def : ARMV5TEPat<(ARMsmlalbb GPR:$Rn, GPR:$Rm, GPR:$RLo, GPR:$RHi),
4628 def : ARMV5TEPat<(ARMsmlalbt GPR:$Rn, GPR:$Rm, GPR:$RLo, GPR:$RHi),
4630 def : ARMV5TEPat<(ARMsmlaltb GPR:$Rn, GPR:$Rm, GPR:$RLo, GPR:$RHi),
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFInstrInfo.td189 (ins GPR:$dst, GPR:$src, brtarget:$BrDst),
300 (ins GPR:$src2, GPR:$src),
401 (outs GPR:$dst), (ins GPR:$src),
405 (outs GPR:$dst), (ins GPR:$src),
409 (outs GPR:$dst), (ins GPR:$src),
687 (ins GPR:$lhs, GPR:$rhs, i64imm:$imm, GPR:$src, GPR:$src2),
692 (ins GPR:$lhs, i64imm:$rhs, i64imm:$imm, GPR:$src, GPR:$src2),
739 def : Pat<(BPFcall GPR:$dst), (JALX GPR:$dst)>;
1016 (ins GPR:$skb, GPR:$val),
1018 [(set R0, (OpNode GPR:$skb, GPR:$val))]> {
[all …]
/freebsd/contrib/llvm-project/lldb/source/Plugins/Process/Utility/
H A DRegisterInfos_powerpc.h12 #define GPR_OFFSET(regname) (offsetof(GPR, regname))
13 #define FPR_OFFSET(regname) (sizeof(GPR) + offsetof(FPR, regname))
14 #define VMX_OFFSET(regname) (sizeof(GPR) + sizeof(FPR) + offsetof(VMX, regname))
15 #define GPR_SIZE(regname) (sizeof(((GPR *)NULL)->regname))
188 #define GPR GPR64 macro
190 #undef GPR
194 #define GPR GPR32 macro
196 #undef GPR
200 #define GPR GPR64 macro
205 (offsetof(GPR, regname) + (sizeof(((GPR *)NULL)->regname) - GPR_SIZE(reg)))
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64GenRegisterBankInfo.def28 // 6: GPR 32-bit value.
30 // 7: GPR 64-bit value.
32 // 8: GPR 128-bit value.
67 // 19: GPR 32-bit value.
71 // 22: GPR 64-bit value.
85 // 30: FPR 32-bit value to GPR 32-bit value.
88 // 32: FPR 64-bit value to GPR 64-bit value.
91 // 34: FPR 128-bit value to GPR 128-bit value (invalid)
100 // 40: GPR 32-bit value to FPR 32-bit value.
219 PMI_FirstGPR, // GPR
[all …]

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