/freebsd/contrib/llvm-project/llvm/include/llvm/Support/ |
H A D | MathExtras.h | 278 inline bool isShiftedMask_32(uint32_t Value, unsigned &MaskIdx, in isShiftedMask_32() argument 282 MaskIdx = llvm::countr_zero(Value); in isShiftedMask_32() 291 inline bool isShiftedMask_64(uint64_t Value, unsigned &MaskIdx, in isShiftedMask_64() argument 295 MaskIdx = llvm::countr_zero(Value); in isShiftedMask_64()
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/freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
H A D | VVPISelLowering.cpp | 68 auto MaskIdx = ISD::getVPMaskIdx(Opcode); in lowerToVVP() local 70 if (MaskIdx) in lowerToVVP() 71 Mask = Op->getOperand(*MaskIdx); in lowerToVVP()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 2288 uint64_t MaskIdx = 0; in LowerVECTOR_SHUFFLE() local 2295 MaskIdx |= M << S; in LowerVECTOR_SHUFFLE() 2300 if (MaskIdx == (0x03020100 | MaskUnd)) in LowerVECTOR_SHUFFLE() 2303 if (MaskIdx == (0x00010203 | MaskUnd)) { in LowerVECTOR_SHUFFLE() 2312 if (MaskIdx == (0x06040200 | MaskUnd)) in LowerVECTOR_SHUFFLE() 2314 if (MaskIdx == (0x07050301 | MaskUnd)) in LowerVECTOR_SHUFFLE() 2319 if (MaskIdx == (0x02000604 | MaskUnd)) in LowerVECTOR_SHUFFLE() 2321 if (MaskIdx == (0x03010705 | MaskUnd)) in LowerVECTOR_SHUFFLE() 2327 if (MaskIdx == (0x0706050403020100ull | MaskUnd)) in LowerVECTOR_SHUFFLE() 2337 if (MaskIdx == (0x0d0c050409080100ull | MaskUnd)) in LowerVECTOR_SHUFFLE() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
H A D | LoongArchISelLowering.cpp | 2201 unsigned MaskIdx, MaskLen; in performSRLCombine() local 2208 !isShiftedMask_64(CN->getZExtValue(), MaskIdx, MaskLen)) in performSRLCombine() 2216 if (MaskIdx <= Shamt && Shamt <= MaskIdx + MaskLen - 1) in performSRLCombine() 2219 DAG.getConstant(MaskIdx + MaskLen - 1, DL, GRLenVT), in performSRLCombine() 2362 unsigned MaskIdx, MaskLen; in performORCombine() local 2365 isShiftedMask_64(CNMask->getZExtValue(), MaskIdx, MaskLen) && in performORCombine() 2389 isShiftedMask_64(CNMask->getZExtValue(), MaskIdx, MaskLen) && in performORCombine() 2392 CNShamt->getZExtValue() == MaskIdx) { in performORCombine() 2399 DAG.getConstant(MaskIdx, DL, GRLenVT)); in performORCombine() 2423 isShiftedMask_64(CNMask->getZExtValue(), MaskIdx, MaskLen)) { in performORCombine() [all …]
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H A D | LoongArchInstrInfo.td | 573 unsigned MaskIdx, MaskLen; 575 ? llvm::isShiftedMask_32(~Imm, MaskIdx, MaskLen) 576 : llvm::isShiftedMask_64(~Imm, MaskIdx, MaskLen); 581 unsigned MaskIdx, MaskLen; 583 ? llvm::isShiftedMask_32(~Imm, MaskIdx, MaskLen) 584 : llvm::isShiftedMask_64(~Imm, MaskIdx, MaskLen); 585 return CurDAG->getTargetConstant(MaskIdx + MaskLen - 1, SDLoc(N), 591 unsigned MaskIdx, MaskLen; 593 ? llvm::isShiftedMask_32(~Imm, MaskIdx, MaskLen) 594 : llvm::isShiftedMask_64(~Imm, MaskIdx, MaskLen); [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVInstrInfoVPseudos.td | 570 bits<4> MaskOpIdx = MaskIdx; 1871 RISCVMaskedPseudo<MaskIdx=2>, 1889 RISCVMaskedPseudo<MaskIdx=2>, 1917 RISCVMaskedPseudo<MaskIdx=3>, 1947 RISCVMaskedPseudo<MaskIdx=3>, 2571 RISCVMaskedPseudo<MaskIdx = 2>, 2588 RISCVMaskedPseudo<MaskIdx = 2>, 2603 RISCVMaskedPseudo<MaskIdx = 2>, 2619 RISCVMaskedPseudo<MaskIdx=2>, 2635 RISCVMaskedPseudo<MaskIdx=2>, [all …]
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H A D | RISCVInstrInfoZvk.td | 342 RISCVMaskedPseudo<MaskIdx=2>;
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H A D | RISCVISelLowering.cpp | 4934 bool IsSelect = all_of(enumerate(Mask), [&](const auto &MaskIdx) { in lowerVECTOR_SHUFFLE() argument 4935 int MaskIndex = MaskIdx.value(); in lowerVECTOR_SHUFFLE() 4936 return MaskIndex < 0 || MaskIdx.index() == (unsigned)MaskIndex % NumElts; in lowerVECTOR_SHUFFLE() 10474 auto MaskIdx = ISD::getVPMaskIdx(Op.getOpcode()); in lowerVPOp() local 10475 if (MaskIdx) { in lowerVPOp() 10476 if (*MaskIdx == OpIdx.index()) in lowerVPOp()
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/freebsd/contrib/llvm-project/llvm/include/llvm/ADT/ |
H A D | APInt.h | 500 bool isShiftedMask(unsigned &MaskIdx, unsigned &MaskLen) const { in isShiftedMask() argument 502 return isShiftedMask_64(U.VAL, MaskIdx, MaskLen); in isShiftedMask() 509 MaskIdx = TrailZ; in isShiftedMask()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86InstCombineIntrinsic.cpp | 2067 unsigned MaskIdx, MaskLen; in instCombineIntrinsic() local 2068 if (MaskC->getValue().isShiftedMask(MaskIdx, MaskLen)) { in instCombineIntrinsic() 2074 Value *ShiftAmt = ConstantInt::get(II.getType(), MaskIdx); in instCombineIntrinsic() 2111 unsigned MaskIdx, MaskLen; in instCombineIntrinsic() local 2112 if (MaskC->getValue().isShiftedMask(MaskIdx, MaskLen)) { in instCombineIntrinsic() 2117 Value *ShiftAmt = ConstantInt::get(II.getType(), MaskIdx); in instCombineIntrinsic()
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H A D | X86ISelDAGToDAG.cpp | 2135 unsigned MaskIdx, MaskLen; in foldMaskAndShiftToScale() local 2136 if (!isShiftedMask_64(Mask, MaskIdx, MaskLen)) in foldMaskAndShiftToScale() 2138 unsigned MaskLZ = 64 - (MaskIdx + MaskLen); in foldMaskAndShiftToScale() 2144 unsigned AMShiftAmt = MaskIdx; in foldMaskAndShiftToScale() 2234 unsigned MaskIdx, MaskLen; in foldMaskedShiftToBEXTR() local 2235 if (!isShiftedMask_64(Mask, MaskIdx, MaskLen)) in foldMaskedShiftToBEXTR() 2242 unsigned AMShiftAmt = MaskIdx; in foldMaskedShiftToBEXTR()
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H A D | X86ISelLowering.cpp | 9489 int MaskIdx = Mask[i]; in isShuffleEquivalent() local 9491 if (0 <= MaskIdx && MaskIdx != ExpectedIdx) { in isShuffleEquivalent() 9492 SDValue MaskV = MaskIdx < Size ? V1 : V2; in isShuffleEquivalent() 9494 MaskIdx = MaskIdx < Size ? MaskIdx : (MaskIdx - Size); in isShuffleEquivalent() 9540 int MaskIdx = Mask[i]; in isTargetShuffleEquivalent() local 9542 if (MaskIdx == SM_SentinelUndef || MaskIdx == ExpectedIdx) in isTargetShuffleEquivalent() 9544 if (MaskIdx == SM_SentinelZero) { in isTargetShuffleEquivalent() 9557 if (MaskIdx >= 0) { in isTargetShuffleEquivalent() 9558 SDValue MaskV = MaskIdx < Size ? V1 : V2; in isTargetShuffleEquivalent() 9560 MaskIdx = MaskIdx < Size ? MaskIdx : (MaskIdx - Size); in isTargetShuffleEquivalent() [all …]
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/freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
H A D | CodeGenFunction.cpp | 2966 for (unsigned MaskIdx = 0; in emitBoolVecConversion() local 2967 MaskIdx < std::min<>(NumElementsDst, NumElementsSrc); ++MaskIdx) in emitBoolVecConversion() 2968 ShuffleMask[MaskIdx] = MaskIdx; in emitBoolVecConversion()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | ComplexDeinterleavingPass.cpp | 499 int MaskIdx = Idx * 2; in isInterleavingMask() local 500 if (Mask[MaskIdx] != Idx || Mask[MaskIdx + 1] != (Idx + HalfNumElements)) in isInterleavingMask()
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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyISelLowering.cpp | 1871 const SDValue &MaskIdx = Op.getOperand(OpIdx + 1); in LowerIntrinsic() local 1872 if (MaskIdx.isUndef() || MaskIdx.getNode()->getAsZExtVal() >= 32) { in LowerIntrinsic() 1873 bool isTarget = MaskIdx.getNode()->getOpcode() == ISD::TargetConstant; in LowerIntrinsic() 1876 Ops[OpIdx++] = MaskIdx; in LowerIntrinsic()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineCompares.cpp | 309 auto MaskIdx = [&](Value *Idx) { in foldCmpLoadFromIndexedGlobal() local 321 Idx = MaskIdx(Idx); in foldCmpLoadFromIndexedGlobal() 342 Idx = MaskIdx(Idx); in foldCmpLoadFromIndexedGlobal() 365 Idx = MaskIdx(Idx); in foldCmpLoadFromIndexedGlobal() 381 Idx = MaskIdx(Idx); in foldCmpLoadFromIndexedGlobal() 408 Idx = MaskIdx(Idx); in foldCmpLoadFromIndexedGlobal()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelLowering.cpp | 4057 unsigned MaskIdx, MaskLen; in performSrlCombine() local 4058 if (Mask->getAPIntValue().isShiftedMask(MaskIdx, MaskLen) && in performSrlCombine() 4059 MaskIdx == ShiftAmt) { in performSrlCombine()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeVectorTypes.cpp | 2665 int MaskIdx = MaskElt / NewElts; in SplitVecRes_VECTOR_SHUFFLE() local 2666 if (OpIdx == MaskIdx) in SplitVecRes_VECTOR_SHUFFLE()
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H A D | DAGCombiner.cpp | 26403 if (auto MaskIdx = ISD::getVPMaskIdx(N->getOpcode())) in visitVPOp() local 26405 ISD::isConstantSplatVectorAllZeros(N->getOperand(*MaskIdx).getNode()); in visitVPOp()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 10986 SDValue MaskIdx = MaskSource.getOperand(1); in ReconstructShuffleWithRuntimeMask() local 10987 if (!isa<ConstantSDNode>(MaskIdx) || in ReconstructShuffleWithRuntimeMask() 10988 !cast<ConstantSDNode>(MaskIdx)->getConstantIntValue()->equalsInt(i)) in ReconstructShuffleWithRuntimeMask() 16403 unsigned MaskIdx, MaskLen; in isDesirableToCommuteXorWithShift() local 16404 if (XorC->getAPIntValue().isShiftedMask(MaskIdx, MaskLen)) { in isDesirableToCommuteXorWithShift() 16408 return MaskIdx == ShiftAmt && MaskLen == (BitWidth - ShiftAmt); in isDesirableToCommuteXorWithShift() 16409 return MaskIdx == 0 && MaskLen == (BitWidth - ShiftAmt); in isDesirableToCommuteXorWithShift()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 13845 unsigned MaskIdx, MaskLen; in isDesirableToCommuteXorWithShift() local 13846 if (XorC->getAPIntValue().isShiftedMask(MaskIdx, MaskLen)) { in isDesirableToCommuteXorWithShift() 13850 return MaskIdx == ShiftAmt && MaskLen == (BitWidth - ShiftAmt); in isDesirableToCommuteXorWithShift() 13851 return MaskIdx == 0 && MaskLen == (BitWidth - ShiftAmt); in isDesirableToCommuteXorWithShift()
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