/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeIntegerTypes.cpp | 371 SVT = NVT; in PromoteIntRes_AtomicCmpSwap() 539 return DAG.getNode(ISD::SRL, dl, NVT, DAG.getNode(ISD::BSWAP, dl, NVT, Op), in PromoteIntRes_BSWAP() 621 NVT.getScalarSizeInBits() - OVT.getScalarSizeInBits(), dl, NVT); in PromoteIntRes_CTLZ() 1244 SVT = NVT; in PromoteIntRes_SETCC() 3210 SDVTList VTList = DAG.getVTList(NVT, getSetCCResultType(NVT)); in ExpandIntRes_ADDSUB() 3311 Carry = DAG.getSelect(dl, NVT, Cmp, DAG.getConstant(1, dl, NVT), in ExpandIntRes_ADDSUB() 3329 Borrow = DAG.getSelect(dl, NVT, Cmp, DAG.getConstant(1, dl, NVT), in ExpandIntRes_ADDSUB() 3625 DAG.getShiftAmountConstant(NVT.getSizeInBits() - 1, NVT, dl)); in ExpandIntRes_ABS() 3626 SDVTList VTList = DAG.getVTList(NVT, getSetCCResultType(NVT)); in ExpandIntRes_ABS() 3673 Lo = DAG.getNode(ISD::ADD, dl, NVT, DAG.getNode(ISD::CTPOP, dl, NVT, Lo), in ExpandIntRes_CTPOP() [all …]
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H A D | LegalizeFloatTypes.cpp | 857 EVT NVT = EVT(); in SoftenFloatRes_XINT_TO_FP() local 1054 EVT NVT = EVT(); in SoftenFloatOp_FP_TO_XINT() local 2038 EVT NVT; in ExpandFloatOp_FP_TO_XINT() local 2109 (void)NVT; in ExpandFloatOp_STORE() 2484 return DAG.getNode(GetPromotionOpcode(VT, NVT), SDLoc(N), NVT, Cast); in PromoteFloatRes_BITCAST() 2501 return DAG.getNode(GetPromotionOpcode(VT, NVT), DL, NVT, C); in PromoteFloatRes_ConstantFP() 2647 return DAG.getNode(GetPromotionOpcode(VT, NVT), DL, NVT, Round); in PromoteFloatRes_FP_ROUND() 2971 Op0 = DAG.getNode(GetPromotionOpcode(OVT, NVT), dl, NVT, Op0); in SoftPromoteHalfRes_ExpOp() 2986 Op = DAG.getNode(GetPromotionOpcode(OVT, NVT), dl, NVT, Op); in SoftPromoteHalfRes_FFREXP() 3067 Op = DAG.getNode(GetPromotionOpcode(OVT, NVT), dl, NVT, Op); in SoftPromoteHalfRes_UnaryOp() [all …]
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H A D | LegalizeTypesGeneric.cpp | 110 while (!isTypeLegal(NVT)) { in ExpandRes_BITCAST() 120 if (isTypeLegal(NVT)) { in ExpandRes_BITCAST() 260 assert(NVT.isByteSized() && "Expanded type not byte sized!"); in ExpandRes_NormalLoad() 262 Lo = DAG.getLoad(NVT, dl, Chain, Ptr, LD->getPointerInfo(), in ExpandRes_NormalLoad() 267 unsigned IncrementSize = NVT.getSizeInBits() / 8; in ExpandRes_NormalLoad() 289 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), OVT); in ExpandRes_VAARG() local 347 EVT NVT = EVT::getVectorVT(*DAG.getContext(), in ExpandOp_BITCAST() local 350 if (!isTypeLegal(NVT)) { in ExpandOp_BITCAST() 354 NVT = N->getValueType(0); in ExpandOp_BITCAST() 469 assert(NVT.isByteSized() && "Expanded type not byte sized!"); in ExpandOp_NormalStore() [all …]
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H A D | LegalizeDAG.cpp | 4670 EVT NVT = EVT(); in ConvertNodeToLibcall() local 4682 if (NVT.bitsGE(SVT)) in ConvertNodeToLibcall() 4713 EVT NVT = EVT(); in ConvertNodeToLibcall() local 4725 if (NVT.bitsGE(RVT)) in ConvertNodeToLibcall() 4995 ISD::SRL, dl, NVT, Tmp1, in PromoteNode() 5175 if (NVT.isInteger()) { in PromoteNode() 5208 if (NVT.isInteger()) { in PromoteNode() 5239 if (NVT.isInteger()) { in PromoteNode() 5413 assert(NVT.isVector() && OVT.getSizeInBits() == NVT.getSizeInBits() && in PromoteNode() 5448 assert(NVT.isVector() && OVT.getSizeInBits() == NVT.getSizeInBits() && in PromoteNode() [all …]
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H A D | LegalizeTypes.cpp | 988 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), Pair.getValueType()); in GetPairElements() local 989 std::tie(Lo, Hi) = DAG.SplitScalar(Pair, dl, NVT, NVT); in GetPairElements() 999 EVT NVT = EVT::getIntegerVT(*DAG.getContext(), in JoinIntegers() local 1002 EVT ShiftAmtVT = TLI.getShiftAmountTy(NVT, DAG.getDataLayout()); in JoinIntegers() 1003 Lo = DAG.getNode(ISD::ZERO_EXTEND, dlLo, NVT, Lo); in JoinIntegers() 1004 Hi = DAG.getNode(ISD::ANY_EXTEND, dlHi, NVT, Hi); in JoinIntegers() 1005 Hi = DAG.getNode(ISD::SHL, dlHi, NVT, Hi, in JoinIntegers() 1007 return DAG.getNode(ISD::OR, dlHi, NVT, Lo, Hi); in JoinIntegers()
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H A D | LegalizeVectorOps.cpp | 745 MVT NVT = TLI.getTypeToPromoteTo(Node->getOpcode(), VT); in Promote() local 758 NVT.isVector() && NVT.getVectorElementType().isFloatingPoint()) in Promote() 769 if ((VT.isFloatingPoint() && NVT.isFloatingPoint()) || in Promote() 771 NVT.isVector() && NVT.getVectorElementType().isFloatingPoint())) in Promote() 786 MVT NVT = TLI.getTypeToPromoteTo(Node->getOpcode(), VT); in PromoteINT_TO_FP() local 824 MVT NVT = TLI.getTypeToPromoteTo(Node->getOpcode(), VT); in PromoteFP_TO_INT() local 833 TLI.isOperationLegalOrCustom(ISD::FP_TO_SINT, NVT)) in PromoteFP_TO_INT() 837 TLI.isOperationLegalOrCustom(ISD::STRICT_FP_TO_SINT, NVT)) in PromoteFP_TO_INT() 843 Promoted = DAG.getNode(NewOpc, dl, {NVT, MVT::Other}, in PromoteFP_TO_INT() 847 Promoted = DAG.getNode(NewOpc, dl, NVT, Node->getOperand(0)); in PromoteFP_TO_INT() [all …]
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H A D | LegalizeVectorTypes.cpp | 608 EVT NVT = N->getValueType(0).getVectorElementType(); in ScalarizeVecRes_SETCC() local 630 return DAG.getNode(ExtendCode, DL, NVT, Res); in ScalarizeVecRes_SETCC() 849 EVT NVT = VT.getVectorElementType(); in ScalarizeVecOp_VSETCC() local 860 Res = DAG.getNode(ExtendCode, DL, NVT, Res); in ScalarizeVecOp_VSETCC() 7337 if (InVT == NVT) in ModifyToType() 7341 ElementCount WidenEC = NVT.getVectorElementCount(); in ModifyToType() 7351 return DAG.getNode(ISD::CONCAT_VECTORS, dl, NVT, Ops); in ModifyToType() 7366 EVT EltVT = NVT.getVectorElementType(); in ModifyToType() 7377 SDValue Widened = DAG.getBuildVector(NVT, dl, Ops); in ModifyToType() 7381 assert(NVT.isInteger() && in ModifyToType() [all …]
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H A D | DAGCombiner.cpp | 24404 EVT NVT = N->getValueType(0); in visitEXTRACT_SUBVECTOR() local 24410 return DAG.getUNDEF(NVT); in visitEXTRACT_SUBVECTOR() 24452 return DAG.getBitcast(NVT, NewExtract); in visitEXTRACT_SUBVECTOR() 24471 return DAG.getBitcast(NVT, NewExtract); in visitEXTRACT_SUBVECTOR() 24531 unsigned ExtractSize = NVT.getSizeInBits(); in visitEXTRACT_SUBVECTOR() 24550 return DAG.getBitcast(NVT, Src); in visitEXTRACT_SUBVECTOR() 24556 return DAG.getBitcast(NVT, BuildVec); in visitEXTRACT_SUBVECTOR() 24565 if (!NVT.bitsEq(SmallVT)) in visitEXTRACT_SUBVECTOR() 24575 ExtIdx * NVT.getScalarSizeInBits()) { in visitEXTRACT_SUBVECTOR() 24579 return DAG.getBitcast(NVT, V.getOperand(1)); in visitEXTRACT_SUBVECTOR() [all …]
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H A D | LegalizeTypes.h | 1066 SDValue ModifyToType(SDValue InOp, EVT NVT, bool FillWithZeroes = false);
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H A D | TargetLowering.cpp | 1048 EVT NVT = EVT::getIntegerVT(*DAG.getContext(), llvm::bit_ceil(MinWidth)); in combineShiftToAVG() local 1050 NVT = EVT::getVectorVT(*DAG.getContext(), NVT, VT.getVectorElementCount()); in combineShiftToAVG() 1051 if (!TLI.isOperationLegalOrCustom(AVGOpc, NVT)) { in combineShiftToAVG() 1060 NVT = VT; in combineShiftToAVG() 1067 DAG.getNode(AVGOpc, DL, NVT, DAG.getExtOrTrunc(IsSigned, ExtOpA, DL, NVT), in combineShiftToAVG() 1068 DAG.getExtOrTrunc(IsSigned, ExtOpB, DL, NVT)); in combineShiftToAVG()
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H A D | SelectionDAG.cpp | 7565 EVT NVT = TLI.getTypeToTransformTo(C, VT); in getMemcpyLoadsAndStores() local 7566 assert(NVT.bitsGE(VT)); in getMemcpyLoadsAndStores() 7577 ISD::EXTLOAD, dl, NVT, Chain, in getMemcpyLoadsAndStores()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 3732 if (NVT != MVT::i32 && NVT != MVT::i64) in matchBitExtract() 4017 if (XVT != NVT) { in matchBitExtract() 4056 if (NVT != MVT::i32 && NVT != MVT::i64) in matchBEXTRFromAndImm() 4376 if (NVT != MVT::i32 && NVT != MVT::i64) in tryShrinkShlLogicImm() 5224 if (NVT.is512BitVector() || NVT.is256BitVector() || NVT.is128BitVector() || in Select() 5256 if (NVT.isVector() && NVT.getVectorElementType() == MVT::i1) { in Select() 5304 if (NVT != MVT::i8 && NVT != MVT::i16 && NVT != MVT::i32 && NVT != MVT::i64) in Select() 5452 VTs = CurDAG->getVTList(NVT, NVT, MVT::i32, MVT::Other); in Select() 5469 VTs = CurDAG->getVTList(NVT, NVT, MVT::i32); in Select() 5542 SDVTList VTs = CurDAG->getVTList(NVT, NVT, MVT::Other); in Select() [all …]
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H A D | X86ISelLowering.cpp | 6691 SDValue V1 = DAG.getLoad(NVT, dl, Chain, Ptr, in LowerAsSplatVectorLoad() 6696 return DAG.getVectorShuffle(NVT, dl, V1, DAG.getUNDEF(NVT), Mask); in LowerAsSplatVectorLoad() 17654 MVT NVT = VT.changeVectorElementTypeToInteger(); in LowerVSELECT() local 20787 NVT, Src); in LowerFP_TO_INT() 21340 MVT NVT = SVT.changeVectorElementType(MVT::i32); in LowerFP_EXTEND() local 21343 In = DAG.getNode(ISD::SHL, DL, NVT, In, DAG.getConstant(16, DL, NVT)); in LowerFP_EXTEND() 23839 MVT NVT = VT.changeTypeToInteger(); in LowerSELECT() local 31462 if (InVT == NVT) in ExtendToType() 31466 return DAG.getUNDEF(NVT); in ExtendToType() 31499 return DAG.getBuildVector(NVT, dl, Ops); in ExtendToType() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | TargetLoweringBase.cpp | 1011 MVT NVT = TransformToType[SVT.SimpleTy]; in getTypeConversion() local 1016 (NVT.isVector() || in getTypeConversion() 1024 return LegalizeKind(LA, NVT); in getTypeConversion() 1100 if (NVT != MVT() && ValueTypeActions.getTypeAction(NVT) == TypeLegal) in getTypeConversion() 1517 MVT NVT = VT.getPow2VectorType(); in computeRegisterProperties() local 1518 if (isTypeLegal(NVT)) { in computeRegisterProperties() 1519 TransformToType[i] = NVT; in computeRegisterProperties() 1521 RegisterTypeForVT[i] = NVT; in computeRegisterProperties() 1540 MVT NVT = VT.getPow2VectorType(); in computeRegisterProperties() local 1541 if (NVT == VT) { in computeRegisterProperties() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | LegalizerHelper.cpp | 4957 LLT NVT = HalfTy; in narrowScalarShiftByConstant() local 4964 Lo = Hi = MIRBuilder.buildConstant(NVT, 0); in narrowScalarShiftByConstant() 4966 Lo = MIRBuilder.buildConstant(NVT, 0); in narrowScalarShiftByConstant() 4967 Hi = MIRBuilder.buildShl(NVT, InL, in narrowScalarShiftByConstant() 4970 Lo = MIRBuilder.buildConstant(NVT, 0); in narrowScalarShiftByConstant() 4984 Lo = MIRBuilder.buildLShr(NVT, InH, in narrowScalarShiftByConstant() 4986 Hi = MIRBuilder.buildConstant(NVT, 0); in narrowScalarShiftByConstant() 4989 Hi = MIRBuilder.buildConstant(NVT, 0); in narrowScalarShiftByConstant() 5005 Lo = MIRBuilder.buildAShr(NVT, InH, in narrowScalarShiftByConstant() 5007 Hi = MIRBuilder.buildAShr(NVT, InH, in narrowScalarShiftByConstant() [all …]
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | TargetLowering.h | 1570 MVT NVT = VT; in getTypeToPromoteTo() local 1572 NVT = (MVT::SimpleValueType)(NVT.SimpleTy+1); in getTypeToPromoteTo() 1573 assert(NVT.isInteger() == VT.isInteger() && NVT != MVT::isVoid && in getTypeToPromoteTo() 1575 } while (!isTypeLegal(NVT) || in getTypeToPromoteTo() 1576 getOperationAction(Op, NVT) == Promote); in getTypeToPromoteTo() 1577 return NVT; in getTypeToPromoteTo()
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/freebsd/contrib/sendmail/contrib/ |
H A D | mail.local.linux | 138 M:RT'<]('8M,L:N4?VJUC\-NVT:(P+(47W?#6'+']>@?_FB/FOJ]W_P5G,+"/
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 6127 MVT NVT = in LowerOperation() local 6129 SDValue NC = DAG.getNode(Op.getOpcode(), DL, NVT, Op->ops()); in LowerOperation() 6146 MVT NVT = MVT::getVectorVT(MVT::f32, in LowerOperation() local 6148 SDValue WidenVec = DAG.getNode(ISD::FP_EXTEND, DL, NVT, Op1); in LowerOperation() 6698 MVT NVT = in LowerOperation() local 6700 auto NC = DAG.getNode(Op.getOpcode(), DL, NVT, Op->ops()); in LowerOperation() 6717 MVT NVT = MVT::getVectorVT(MVT::f32, in LowerOperation() local 6719 SDValue WidenVec = DAG.getNode(ISD::FP_EXTEND, DL, NVT, Op1); in LowerOperation()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 18170 EVT NVT = in performConcatVectorsCombine() local 18188 DAG.getBuildVector(NVT, dl, Ops)); in performConcatVectorsCombine()
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