| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 1146 unsigned &NumIntermediates, in getVectorTypeBreakdownMVT() argument
1178 NumIntermediates = NumVectorRegs; in getVectorTypeBreakdownMVT()
1532 unsigned NumIntermediates; in computeRegisterProperties() local
1534 NumIntermediates, RegisterVT, this); in computeRegisterProperties()
1599 unsigned &NumIntermediates, in getVectorTypeBreakdown() argument
1615 NumIntermediates = 1; in getVectorTypeBreakdown()
1641 NumIntermediates = in getVectorTypeBreakdown()
1646 return NumIntermediates; in getVectorTypeBreakdown()
1664 NumIntermediates = NumVectorRegs; in getVectorTypeBreakdown()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 1127 unsigned &NumIntermediates,
1135 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv() argument
1136 return getVectorTypeBreakdown(Context, VT, IntermediateVT, NumIntermediates, in getVectorTypeBreakdownForCallingConv()
1653 unsigned NumIntermediates; in getRegisterType() local
1655 NumIntermediates, RegisterVT); in getRegisterType()
1686 unsigned NumIntermediates; variable
1687 return getVectorTypeBreakdown(Context, VT, VT1, NumIntermediates, VT2);
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLoweringCall.cpp | 173 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv() argument
182 NumIntermediates = VT.getVectorNumElements(); in getVectorTypeBreakdownForCallingConv()
183 return NumIntermediates; in getVectorTypeBreakdownForCallingConv()
191 NumIntermediates = 2; in getVectorTypeBreakdownForCallingConv()
200 NumIntermediates, RegisterVT); in getVectorTypeBreakdownForCallingConv()
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| H A D | X86ISelLowering.h | 1532 unsigned &NumIntermediates, MVT &RegisterVT) const override;
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGBuilder.cpp | 353 unsigned NumIntermediates; in getCopyFromPartsVector() local
359 NumIntermediates, RegisterVT); in getCopyFromPartsVector()
374 SmallVector<SDValue, 8> Ops(NumIntermediates); in getCopyFromPartsVector()
375 if (NumIntermediates == NumParts) { in getCopyFromPartsVector()
384 assert(NumParts % NumIntermediates == 0 && in getCopyFromPartsVector()
401 NumIntermediates); in getCopyFromPartsVector()
749 unsigned NumIntermediates; in getCopyToPartsVector() local
801 SmallVector<SDValue, 8> Ops(NumIntermediates); in getCopyToPartsVector()
817 if (NumParts == NumIntermediates) { in getCopyToPartsVector()
826 assert(NumParts % NumIntermediates == 0 && in getCopyToPartsVector()
[all …]
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| H A D | SelectionDAG.cpp | 2437 unsigned NumIntermediates; in getReducedAlign() local
2439 NumIntermediates, RegisterVT); in getReducedAlign()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.h | 304 unsigned &NumIntermediates, MVT &RegisterVT) const override;
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| H A D | MipsISelLowering.cpp | 125 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv() argument
129 NumIntermediates = getNumRegistersForCallingConv(Context, CC, VT); in getVectorTypeBreakdownForCallingConv()
130 return NumIntermediates; in getVectorTypeBreakdownForCallingConv()
133 NumIntermediates = VT.getVectorNumElements(); in getVectorTypeBreakdownForCallingConv()
135 return NumIntermediates * getNumRegisters(Context, IntermediateVT); in getVectorTypeBreakdownForCallingConv()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.h | 45 unsigned &NumIntermediates, MVT &RegisterVT) const override;
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| H A D | SIISelLowering.cpp | 1045 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv() argument
1061 NumIntermediates = (NumElts + 1) / 2; in getVectorTypeBreakdownForCallingConv()
1062 return NumIntermediates; in getVectorTypeBreakdownForCallingConv()
1068 NumIntermediates = NumElts; in getVectorTypeBreakdownForCallingConv()
1069 return NumIntermediates; in getVectorTypeBreakdownForCallingConv()
1076 NumIntermediates = NumElts; in getVectorTypeBreakdownForCallingConv()
1077 return NumIntermediates; in getVectorTypeBreakdownForCallingConv()
1084 NumIntermediates = NumElts; in getVectorTypeBreakdownForCallingConv()
1085 return NumIntermediates; in getVectorTypeBreakdownForCallingConv()
1091 NumIntermediates = NumElts * ((Size + 31) / 32); in getVectorTypeBreakdownForCallingConv()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.h | 498 unsigned &NumIntermediates,
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| H A D | RISCVISelLowering.cpp | 2203 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv() argument
2205 Context, CC, VT, IntermediateVT, NumIntermediates, RegisterVT); in getVectorTypeBreakdownForCallingConv()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 993 unsigned &NumIntermediates,
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| H A D | AArch64ISelLowering.cpp | 27057 unsigned NumIntermediates; in getRegisterTypeForCallingConv() local
27058 getVectorTypeBreakdownForCallingConv(Context, CC, VT, VT1, NumIntermediates, in getRegisterTypeForCallingConv()
27072 unsigned NumIntermediates; in getNumRegistersForCallingConv() local
27074 NumIntermediates, VT2); in getNumRegistersForCallingConv()
27079 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv() argument
27081 Context, CC, VT, IntermediateVT, NumIntermediates, RegisterVT); in getVectorTypeBreakdownForCallingConv()
27099 NumIntermediates = VT.getVectorNumElements(); in getVectorTypeBreakdownForCallingConv()
27101 return NumIntermediates; in getVectorTypeBreakdownForCallingConv()
27108 NumIntermediates *= NumSubRegs; in getVectorTypeBreakdownForCallingConv()
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