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Searched refs:OpSize32 (Results 1 – 16 of 16) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrControl.td36 "{l}ret{l|f}", []>, OpSize32;
42 "{l}ret{l|f}\t$amt", []>, OpSize32;
68 "jmp\t$dst", []>, OpSize32;
87 []>, TB, OpSize32;
119 OpSize32, Sched<[WriteJump]>;
122 OpSize32, Sched<[WriteJumpLd]>;
155 OpSize32, Sched<[WriteJump]>, NOTRACK;
177 OpSize32, Sched<[WriteJump]>;
212 "call{l}\t$dst", []>, OpSize32,
232 OpSize32,
[all …]
H A DX86InstrExtension.td19 "{cwtl|cwde}", []>, OpSize32, Sched<[WriteALU]>;
31 "{cltd|cdq}", []>, OpSize32, Sched<[WriteALU]>;
50 OpSize32, Sched<[WriteALU]>;
54 OpSize32, Sched<[WriteLoad]>;
58 OpSize32, Sched<[WriteALU]>;
62 OpSize32, TB, Sched<[WriteLoad]>;
76 OpSize32, Sched<[WriteALU]>;
80 OpSize32, Sched<[WriteLoad]>;
84 OpSize32, Sched<[WriteALU]>;
88 TB, OpSize32, Sched<[WriteLoad]>;
[all …]
H A DX86InstrSystem.td89 OpSize32;
108 OpSize32;
227 OpSize32;
230 OpSize32;
247 OpSize32;
250 OpSize32;
262 "str{l}\t$dst", []>, TB, OpSize32;
305 OpSize32, Requires<[Not64BitMode]>;
310 OpSize32, Requires<[Not64BitMode]>;
315 OpSize32, Requires<[Not64BitMode]>;
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H A DX86InstrMisc.td624 OpSize32, TB;
656 OpSize32, TB;
674 OpSize32, TB;
689 OpSize32, TB;
700 OpSize32, TB;
730 OpSize32, TB;
741 OpSize32, TB;
775 OpSize32, TB;
786 OpSize32, TB;
865 OpSize32;
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H A DX86InstrArithmetic.td26 OpSize32, Requires<[Not64BitMode]>;
32 OpSize32, Requires<[In64BitMode]>;
376 def INC32r_alt : IncDec_Alt<0x40, "inc", Xi32>, OpSize32;
382 def INC32r : IncOpR_RF<Xi32>, OpSize32;
386 def DEC32r : DecOpR_RF<Xi32>, OpSize32;
429 def INC32m : IncOpM_MF<Xi32>, OpSize32;
432 def DEC32m : DecOpM_MF<Xi32>, OpSize32;
495 def NEG32r : NegOpR_RF<Xi32>, OpSize32;
499 def NOT32r : NotOpR_R<Xi32>, OpSize32;
522 def NEG32m : NegOpM_MF<Xi32>, OpSize32;
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H A DX86InstrCMovSetCC.td30 TB, OpSize32;
49 timm:$cond, EFLAGS))]>, TB, OpSize32;
H A DX86InstrShiftRotate.td26 def 32ri : BinOpRI8U_R<m, RegMRM, Xi32, node>, Sched<[ri]>, DefEFLAGS, OpSize32;
45 def 32mi : BinOpMI8U_M<m, MemMRM, Xi32, node>, Sched<[mi, WriteRMW]>, DefEFLAGS, OpSize32;
63 def 32r1 : UnaryOpR_RF<0xD1, RegMRM, m, Xi32>, OpSize32;
88 def 32m1 : UnaryOpM_MF<0xD1, MemMRM, m, Xi32>, OpSize32;
110 def 32rCL : BinOpRC_R<m, RegMRM, Xi32, node>, Sched<[rCL]>, OpSize32;
128 def 32mCL : BinOpMC_M<m, MemMRM, Xi32, node>, Sched<[mCL, WriteRMW]>, OpSize32;
412 def 32rri8 : ShlrdOpRRI8U_R<o1, m, Xi32, node>, TB, DefEFLAGS, OpSize32;
416 def 32rrCL : ShlrdOpRRC_R<o2, m, Xi32, node>, TB, DefEFLAGS, OpSize32;
456 def 32mri8 : ShlrdOpMRI8U_M<o1, m, Xi32, node>, DefEFLAGS, OpSize32;
460 def 32mrCL : ShlrdOpMRC_M<o2, m, Xi32, node>, DefEFLAGS, OpSize32;
H A DX86InstrTSX.td31 "xbegin\t$dst", []>, OpSize32;
H A DX86InstrCompiler.td381 [(X86rep_movs i32)]>, REP, AdSize32, OpSize32,
400 [(X86rep_movs i32)]>, REP, AdSize64, OpSize32,
681 Requires<[Not64BitMode]>, OpSize32, LOCK,
714 OpSize32, LOCK;
739 OpSize32, LOCK;
770 OpSize32, LOCK;
803 OpSize32, LOCK;
816 OpSize32, LOCK;
878 OpSize32, TB, LOCK;
896 OpSize32, TB, LOCK;
[all …]
H A DX86InstrFormats.td184 def OpSize32 : OperandSize<2>; // Needs 0x66 prefix in 16-bit mode.
H A DX86InstrUtils.td20 class OpSize32 { OperandSize OpSize = OpSize32; }
H A DX86InstrSSE.td5773 Sched<[WritePOPCNT]>, OpSize32, TB, XS;
5779 Sched<[WritePOPCNT.Folded]>, OpSize32, TB, XS;
6682 def CRC32r32r32 : Crc32r<Xi32, GR32, int_x86_sse42_crc32_32_32>, OpSize32;
6683 def CRC32r32m32 : Crc32m<Xi32, GR32, int_x86_sse42_crc32_32_32>, OpSize32;
/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DX86RecognizableInstr.h173 enum { OpSize16 = 1, OpSize32 = 2 }; enumerator
H A DX86RecognizableInstr.cpp980 } else if (OpSize == X86Local::OpSize32) { in typeFromString()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86BaseInfo.h708 OpSize32 = 2 << OpSizeShift, enumerator
H A DX86MCCodeEmitter.cpp1430 (STI.hasFeature(X86::Is16Bit) ? X86II::OpSize32 : X86II::OpSize16)) in emitOpcodePrefix()