| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEInstrInfo.cpp | 50 (Opc == Mips::LWC1) || (Opc == Mips::LDC1) || (Opc == Mips::LDC164)) { in isLoadFromStackSlot()
72 (Opc == Mips::SWC1) || (Opc == Mips::SDC1) || (Opc == Mips::SDC164)) { in isStoreToStackSlot()
630 return (Opc == Mips::BEQ || Opc == Mips::BEQ_MM || Opc == Mips::BNE || in getAnalyzableBrOpc()
631 Opc == Mips::BNE_MM || Opc == Mips::BGTZ || Opc == Mips::BGEZ || in getAnalyzableBrOpc()
632 Opc == Mips::BLTZ || Opc == Mips::BLEZ || Opc == Mips::BEQ64 || in getAnalyzableBrOpc()
633 Opc == Mips::BNE64 || Opc == Mips::BGTZ64 || Opc == Mips::BGEZ64 || in getAnalyzableBrOpc()
634 Opc == Mips::BLTZ64 || Opc == Mips::BLEZ64 || Opc == Mips::BC1T || in getAnalyzableBrOpc()
635 Opc == Mips::BC1F || Opc == Mips::B || Opc == Mips::J || in getAnalyzableBrOpc()
645 Opc == Mips::BLTZC64 || Opc == Mips::BLEZC64 || Opc == Mips::BC || in getAnalyzableBrOpc()
646 Opc == Mips::BBIT0 || Opc == Mips::BBIT1 || Opc == Mips::BBIT032 || in getAnalyzableBrOpc()
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| H A D | Mips16InstrInfo.cpp | 73 unsigned Opc = 0; in copyPhysReg() local
115 unsigned Opc = 0; in storeRegToStack() local
133 unsigned Opc = 0; in loadRegFromStack() local
159 switch (Opc) { in getOppositeBranchOpc()
433 return (Opc == Mips::BeqzRxImmX16 || Opc == Mips::BimmX16 || in getAnalyzableBrOpc()
435 Opc == Mips::Bteqz16 || Opc == Mips::Btnez16 || in getAnalyzableBrOpc()
436 Opc == Mips::BeqzRxImm16 || Opc == Mips::BnezRxImm16 || in getAnalyzableBrOpc()
437 Opc == Mips::BnezRxImmX16 || Opc == Mips::BteqzX16 || in getAnalyzableBrOpc()
441 Opc == Mips::BtnezX16 || Opc == Mips::BtnezT8CmpX16 || in getAnalyzableBrOpc()
442 Opc == Mips::BtnezT8CmpiX16 || Opc == Mips::BtnezT8SltX16 || in getAnalyzableBrOpc()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelDAGToDAG.cpp | 767 unsigned Opc; in SelectAddrSpaceCast() local
796 unsigned Opc; in SelectAddrSpaceCast() local
2264 unsigned Opc = 0; in tryTextureIntrinsic() local
2269 Opc = NVPTX::TEX_1D_F32_S32_RR; in tryTextureIntrinsic()
2272 Opc = NVPTX::TEX_1D_F32_F32_RR; in tryTextureIntrinsic()
2801 unsigned Opc = 0; in trySurfaceIntrinsic() local
3488 unsigned Opc; in tryBFE() local
3493 Opc = NVPTX::BFE_S32rii; in tryBFE()
3495 Opc = NVPTX::BFE_U32rii; in tryBFE()
3499 Opc = NVPTX::BFE_S64rii; in tryBFE()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 567 return Opc == ARM::B || Opc == ARM::tB || Opc == ARM::t2B; in isUncondBranchOpcode()
643 return Opc == ARM::Bcc || Opc == ARM::tBcc || Opc == ARM::t2Bcc; in isCondBranchOpcode()
647 return Opc == ARM::BR_JTr || Opc == ARM::BR_JTm_i12 || in isJumpTableBranchOpcode()
648 Opc == ARM::BR_JTm_rs || Opc == ARM::BR_JTadd || Opc == ARM::tBR_JTr || in isJumpTableBranchOpcode()
654 return Opc == ARM::BX || Opc == ARM::MOVPCRX || Opc == ARM::tBRIND; in isIndirectBranchOpcode()
720 Opc == ARM::t2LDMIA_RET || Opc == ARM::tPOP || Opc == ARM::LDMIA_UPD || in isPopOpcode()
725 return Opc == ARM::tPUSH || Opc == ARM::t2STMDB_UPD || in isPushOpcode()
731 Opc == ARM::tSUBi3 || Opc == ARM::tSUBi8 || in isSubImmOpcode()
732 Opc == ARM::tSUBSi3 || Opc == ARM::tSUBSi8 || in isSubImmOpcode()
733 Opc == ARM::t2SUBri || Opc == ARM::t2SUBri12 || Opc == ARM::t2SUBSri; in isSubImmOpcode()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/MCTargetDesc/ |
| H A D | WebAssemblyMCTargetDesc.h | 148 switch (Opc) { in GetDefaultP2AlignAny()
285 switch (Opc) { in isConst()
313 switch (Opc) { in isScalarConst()
329 switch (Opc) { in isArgument()
361 switch (Opc) { in isCopy()
383 switch (Opc) { in isTee()
405 switch (Opc) { in isCallDirect()
417 switch (Opc) { in isCallIndirect()
429 switch (Opc) { in isBrTable()
441 switch (Opc) { in isMarker()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CSEMIRBuilder.cpp | 63 if (!CSEInfo || !CSEInfo->shouldCSE(Opc)) in canPerformCSEForOpc()
105 B.addNodeIDOpcode(Opc); in profileMBBOpcode()
113 profileMBBOpcode(B, Opc); in profileEverything()
174 switch (Opc) { in buildInstr()
200 if (Opc == TargetOpcode::G_PTR_ADD && in buildInstr()
277 if (!canPerformCSEForOpc(Opc)) in buildInstr()
305 constexpr unsigned Opc = TargetOpcode::G_CONSTANT; in buildConstant() local
306 if (!canPerformCSEForOpc(Opc)) in buildConstant()
317 profileMBBOpcode(ProfBuilder, Opc); in buildConstant()
333 if (!canPerformCSEForOpc(Opc)) in buildFConstant()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFastISel.cpp | 605 unsigned Opc = in fastMaterializeAlloca() local
662 unsigned Opc; in fastLowerArguments() local
929 unsigned Opc; in selectSelect() local
936 Opc = WebAssembly::SELECT_I32; in selectSelect()
940 Opc = WebAssembly::SELECT_I64; in selectSelect()
944 Opc = WebAssembly::SELECT_F32; in selectSelect()
1030 unsigned Opc; in selectICmp() local
1099 unsigned Opc; in selectFCmp() local
1198 unsigned Opc; in selectLoad() local
1257 unsigned Opc; in selectStore() local
[all …]
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | ConstantFolder.h | 48 if (ConstantExpr::isDesirableBinOp(Opc)) in FoldBinOp()
49 return ConstantExpr::get(Opc, LC, RC); in FoldBinOp()
50 return ConstantFoldBinaryInstruction(Opc, LC, RC); in FoldBinOp()
60 if (ConstantExpr::isDesirableBinOp(Opc)) in FoldExactBinOp()
61 return ConstantExpr::get(Opc, LC, RC, in FoldExactBinOp()
63 return ConstantFoldBinaryInstruction(Opc, LC, RC); in FoldExactBinOp()
73 if (ConstantExpr::isDesirableBinOp(Opc)) { in FoldNoWrapBinOp()
79 return ConstantExpr::get(Opc, LC, RC, Flags); in FoldNoWrapBinOp()
81 return ConstantFoldBinaryInstruction(Opc, LC, RC); in FoldNoWrapBinOp()
88 return FoldBinOp(Opc, LHS, RHS); in FoldBinOpFMF()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDGPUBaseInfo.cpp | 384 int getMTBUFElements(unsigned Opc) { in getMTBUFElements() argument
414 int getMUBUFElements(unsigned Opc) { in getMUBUFElements() argument
439 bool getSMEMIsBuffer(unsigned Opc) { in getSMEMIsBuffer() argument
444 bool getVOP1IsSingle(unsigned Opc) { in getVOP1IsSingle() argument
459 bool isVOPC64DPP(unsigned Opc) { in isVOPC64DPP() argument
460 return isVOPC64DPPOpcodeHelper(Opc) || isVOPC64DPP8OpcodeHelper(Opc); in isVOPC64DPP()
463 bool getMAIIsDGEMM(unsigned Opc) { in getMAIIsDGEMM() argument
494 bool isVOPD(unsigned Opc) { in isVOPD() argument
498 bool isMAC(unsigned Opc) { in isMAC() argument
521 bool isPermlane16(unsigned Opc) { in isPermlane16() argument
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| H A D | AMDGPUBaseInfo.h | 442 int getMTBUFElements(unsigned Opc);
460 int getMUBUFElements(unsigned Opc);
475 bool getSMEMIsBuffer(unsigned Opc);
478 bool getVOP1IsSingle(unsigned Opc);
481 bool getVOP2IsSingle(unsigned Opc);
487 bool isVOPC64DPP(unsigned Opc);
491 bool getMAIIsDGEMM(unsigned Opc);
527 bool isVOPD(unsigned Opc);
530 bool isMAC(unsigned Opc);
533 bool isPermlane16(unsigned Opc);
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcInstrInfo.cpp | 161 static bool isUncondBranchOpcode(int Opc) { return Opc == SP::BA; } in isUncondBranchOpcode() argument
164 return Opc == SP::BCOND || Opc == SP::BPICC || Opc == SP::BPICCA || in isI32CondBranchOpcode()
165 Opc == SP::BPICCNT || Opc == SP::BPICCANT; in isI32CondBranchOpcode()
169 return Opc == SP::BPXCC || Opc == SP::BPXCCA || Opc == SP::BPXCCNT || in isI64CondBranchOpcode()
170 Opc == SP::BPXCCANT; in isI64CondBranchOpcode()
174 return Opc == SP::BPR || Opc == SP::BPRA || Opc == SP::BPRNT || in isRegCondBranchOpcode()
175 Opc == SP::BPRANT; in isRegCondBranchOpcode()
179 return Opc == SP::FBCOND || Opc == SP::FBCONDA || Opc == SP::FBCOND_V9 || in isFCondBranchOpcode()
184 return isI32CondBranchOpcode(Opc) || isI64CondBranchOpcode(Opc) || in isCondBranchOpcode()
185 isRegCondBranchOpcode(Opc) || isFCondBranchOpcode(Opc); in isCondBranchOpcode()
[all …]
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | WebAssemblyDisassemblerEmitter.cpp | 41 unsigned Opc = static_cast<unsigned>( in emitWebAssemblyDisassemblerTables() local
44 if (Opc == 0xFFFFFFFF) in emitWebAssemblyDisassemblerTables()
46 assert(Opc <= 0xFFFFFF); in emitWebAssemblyDisassemblerTables()
48 if (Opc <= 0xFFFF) { in emitWebAssemblyDisassemblerTables()
49 Prefix = Opc >> 8; in emitWebAssemblyDisassemblerTables()
50 Opc = Opc & 0xFF; in emitWebAssemblyDisassemblerTables()
52 Prefix = Opc >> 16; in emitWebAssemblyDisassemblerTables()
53 Opc = Opc & 0xFFFF; in emitWebAssemblyDisassemblerTables()
55 auto &CGIP = OpcodeTable[Prefix][Opc]; in emitWebAssemblyDisassemblerTables()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/ |
| H A D | TargetFolder.h | 54 Value *FoldBinOp(Instruction::BinaryOps Opc, Value *LHS, in FoldBinOp() argument
59 if (ConstantExpr::isDesirableBinOp(Opc)) in FoldBinOp()
60 return Fold(ConstantExpr::get(Opc, LC, RC)); in FoldBinOp()
61 return ConstantFoldBinaryOpOperands(Opc, LC, RC, DL); in FoldBinOp()
71 if (ConstantExpr::isDesirableBinOp(Opc)) in FoldExactBinOp()
74 return ConstantFoldBinaryOpOperands(Opc, LC, RC, DL); in FoldExactBinOp()
84 if (ConstantExpr::isDesirableBinOp(Opc)) { in FoldNoWrapBinOp()
90 return Fold(ConstantExpr::get(Opc, LC, RC, Flags)); in FoldNoWrapBinOp()
99 return FoldBinOp(Opc, LHS, RHS); in FoldBinOpFMF()
110 Value *FoldUnOpFMF(Instruction::UnaryOps Opc, Value *V, in FoldUnOpFMF() argument
[all …]
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| H A D | InstSimplifyFolder.h | 50 Value *FoldBinOp(Instruction::BinaryOps Opc, Value *LHS, in FoldBinOp() argument
52 return simplifyBinOp(Opc, LHS, RHS, SQ); in FoldBinOp()
55 Value *FoldExactBinOp(Instruction::BinaryOps Opc, Value *LHS, Value *RHS, in FoldExactBinOp() argument
57 return simplifyBinOp(Opc, LHS, RHS, SQ); in FoldExactBinOp()
60 Value *FoldNoWrapBinOp(Instruction::BinaryOps Opc, Value *LHS, Value *RHS, in FoldNoWrapBinOp() argument
62 return simplifyBinOp(Opc, LHS, RHS, SQ); in FoldNoWrapBinOp()
65 Value *FoldBinOpFMF(Instruction::BinaryOps Opc, Value *LHS, Value *RHS, in FoldBinOpFMF() argument
67 return simplifyBinOp(Opc, LHS, RHS, FMF, SQ); in FoldBinOpFMF()
70 Value *FoldUnOpFMF(Instruction::UnaryOps Opc, Value *V, in FoldUnOpFMF() argument
72 return simplifyUnOp(Opc, V, FMF, SQ); in FoldUnOpFMF()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIPreAllocateWWMRegs.cpp | 166 unsigned Opc = MI.getOpcode(); in printWWMInfo() local
168 if (Opc == AMDGPU::ENTER_STRICT_WWM || Opc == AMDGPU::ENTER_STRICT_WQM || in printWWMInfo()
169 Opc == AMDGPU::ENTER_PSEUDO_WM) { in printWWMInfo()
172 assert(Opc == AMDGPU::EXIT_STRICT_WWM || Opc == AMDGPU::EXIT_STRICT_WQM || in printWWMInfo()
173 Opc == AMDGPU::EXIT_PSEUDO_WM); in printWWMInfo()
177 if (Opc == AMDGPU::ENTER_STRICT_WWM || Opc == AMDGPU::EXIT_STRICT_WWM) { in printWWMInfo()
179 } else if (Opc == AMDGPU::ENTER_PSEUDO_WM || Opc == AMDGPU::EXIT_PSEUDO_WM) { in printWWMInfo()
182 assert(Opc == AMDGPU::ENTER_STRICT_WQM || Opc == AMDGPU::EXIT_STRICT_WQM); in printWWMInfo()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 451 unsigned Opc; in PPCEmitLoad() local
489 Opc = PPC::LD; in PPCEmitLoad()
551 switch (Opc) { in PPCEmitLoad()
620 unsigned Opc; in PPCEmitStore() local
701 switch (Opc) { in PPCEmitStore()
1088 unsigned Opc; in SelectIToFP() local
1132 unsigned Opc; in SelectIToFP() local
1224 unsigned Opc; in SelectFPToI() local
1285 unsigned Opc; in SelectBinaryIntOp() local
1816 unsigned Opc; in PPCEmitIntExt() local
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| H A D | PPCCTRLoopsVerify.cpp | 115 unsigned Opc = I->getOpcode(); in verifyCTRBranch() local
116 if (Opc == PPC::MTCTRloop || Opc == PPC::MTCTR8loop) { in verifyCTRBranch()
173 unsigned Opc = MII->getOpcode(); in runOnMachineFunction() local
174 if (Opc == PPC::BDNZ8 || Opc == PPC::BDNZ || in runOnMachineFunction()
175 Opc == PPC::BDZ8 || Opc == PPC::BDZ) in runOnMachineFunction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 333 unsigned Opc = 0; in X86FastEmitLoad() local
490 unsigned Opc = 0; in X86FastEmitStore() local
678 if (Opc) { in X86FastEmitStore()
2273 unsigned Opc; in X86FastEmitPseudoSelect() local
2489 unsigned Opc = in X86SelectFPExt() local
2666 unsigned Opc; in fastLowerIntrinsicCall() local
2808 unsigned Opc; in fastLowerIntrinsicCall() local
2997 unsigned Opc; in fastLowerIntrinsicCall() local
3043 unsigned Opc; in fastLowerIntrinsicCall() local
3916 if (Opc) { in fastMaterializeConstant()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVMatInt.cpp | 321 unsigned Opc; in generateInstSeq() local
323 Opc = RISCV::BCLRI; in generateInstSeq()
326 Opc = RISCV::BSETI; in generateInstSeq()
343 Opc = 0; in generateInstSeq()
348 Opc = RISCV::BSETI; in generateInstSeq()
350 Opc = RISCV::BCLRI; in generateInstSeq()
354 if (Opc > 0) { in generateInstSeq()
368 unsigned Opc = 0; in generateInstSeq() local
373 Opc = RISCV::SH1ADD; in generateInstSeq()
376 Opc = RISCV::SH2ADD; in generateInstSeq()
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| H A D | RISCVMatInt.h | 29 unsigned Opc; variable
33 Inst(unsigned Opc, int64_t I) : Opc(Opc), Imm(I) { in Inst() argument
37 unsigned getOpcode() const { return Opc; } in getOpcode()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCFrameLowering.cpp | 137 unsigned Opc = ARC::SUB_rrlimm; in emitPrologue() local
139 Opc = ARC::SUB_rru6; in emitPrologue()
141 Opc = ARC::SUB_rrs12; in emitPrologue()
256 Opc = ARC::SUB_rru6; in emitEpilogue()
284 Opc = ARC::ADD_rru6; in emitEpilogue()
286 Opc = ARC::ADD_rrs12; in emitEpilogue()
299 Opc = ARC::ADD_rru6; in emitEpilogue()
301 Opc = ARC::ADD_rrs12; in emitEpilogue()
326 Opc = ARC::ADD_rru6; in emitEpilogue()
328 Opc = ARC::ADD_rrs12; in emitEpilogue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 1473 switch (Opc) { in getTestBitReg()
1516 switch (Opc) { in getTestBitReg()
3848 if (!Opc) { in selectVectorICmp()
4309 unsigned Opc; in emitLoadFromConstantPool() local
6267 unsigned Opc; in selectIntrinsicWithSideEffects() local
6333 unsigned Opc; in selectIntrinsicWithSideEffects() local
6399 unsigned Opc; in selectIntrinsicWithSideEffects() local
6441 unsigned Opc; in selectIntrinsicWithSideEffects() local
6465 unsigned Opc; in selectIntrinsicWithSideEffects() local
6489 unsigned Opc; in selectIntrinsicWithSideEffects() local
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 209 switch (Opc) { in getBranchDisplacementBits()
695 return Opc; in canFoldIntoCSel()
1050 switch (Opc) { in isSEHInstruction()
2258 switch (Opc) { in hasUnscaledLdStOffset()
2294 switch (Opc) { in getUnscaledLdSt()
2324 switch (Opc) { in getLoadStoreImmIdx()
2513 switch (Opc) { in convertToFlagSettingOpc()
3963 switch (Opc) { in getMemScale()
5286 switch (Opc) { in emitFrameOffsetAdj()
5312 if (Opc == AArch64::ADDVL_XXI || Opc == AArch64::ADDSVL_XXI) in emitFrameOffsetAdj()
[all …]
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| /freebsd/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/ |
| H A D | ConversionChecker.cpp | 81 BinaryOperator::Opcode Opc = B->getOpcode(); in checkPreStmt() local
82 if (Opc == BO_Assign) { in checkPreStmt()
87 } else if (Opc == BO_AddAssign || Opc == BO_SubAssign) { in checkPreStmt()
90 } else if (Opc == BO_MulAssign) { in checkPreStmt()
93 } else if (Opc == BO_DivAssign || Opc == BO_RemAssign) { in checkPreStmt()
96 } else if (Opc == BO_AndAssign) { in checkPreStmt()
99 } else if (Opc == BO_OrAssign || Opc == BO_XorAssign) { in checkPreStmt()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | XRayInstrumentation.cpp | 96 unsigned Opc = 0; in replaceRetWithPatchableRet() local
101 Opc = TargetOpcode::PATCHABLE_RET; in replaceRetWithPatchableRet()
106 Opc = TargetOpcode::PATCHABLE_TAIL_CALL; in replaceRetWithPatchableRet()
108 if (Opc != 0) { in replaceRetWithPatchableRet()
109 auto MIB = BuildMI(MBB, T, T.getDebugLoc(), TII->get(Opc)) in replaceRetWithPatchableRet()
129 unsigned Opc = 0; in prependRetWithPatchableExit() local
132 Opc = TargetOpcode::PATCHABLE_FUNCTION_EXIT; in prependRetWithPatchableExit()
135 Opc = TargetOpcode::PATCHABLE_TAIL_CALL; in prependRetWithPatchableExit()
137 if (Opc != 0) { in prependRetWithPatchableExit()
140 BuildMI(MBB, T, T.getDebugLoc(), TII->get(Opc)); in prependRetWithPatchableExit()
|