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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86TargetMachine.cpp128 if (!TT.isArch64Bit() || TT.isX32() || TT.isOSNaCl()) in computeDataLayout()
137 if (TT.isArch64Bit() || TT.isOSWindows() || TT.isOSNaCl()) in computeDataLayout()
145 if (TT.isOSNaCl() || TT.isOSIAMCU()) in computeDataLayout()
147 else if (TT.isArch64Bit() || TT.isOSDarwin() || TT.isWindowsMSVCEnvironment()) in computeDataLayout()
152 if (TT.isOSIAMCU()) in computeDataLayout()
156 if (TT.isArch64Bit()) in computeDataLayout()
162 if ((!TT.isArch64Bit() && TT.isOSWindows()) || TT.isOSIAMCU()) in computeDataLayout()
233 T, computeDataLayout(TT), TT, CPU, FS, Options, in X86TargetMachine()
240 if (TT.isPS() || TT.isOSBinFormatMachO()) { in X86TargetMachine()
519 if (TT.isOSWindows() && TT.getArch() == Triple::x86) in addPreISel()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCAsmBackend.cpp87 Triple TT; member in __anon0ad9240e0111::PPCAsmBackend
92 TT(TT) {} in PPCAsmBackend()
227 ELFPPCAsmBackend(const Target &T, const Triple &TT) : PPCAsmBackend(T, TT) {} in ELFPPCAsmBackend() argument
232 bool Is64 = TT.isPPC64(); in createObjectTargetWriter()
242 : PPCAsmBackend(T, TT) {} in XCOFFPPCAsmBackend()
256 if (TT.isOSBinFormatELF()) { in getFixupKind()
258 if (TT.isPPC64()) { in getFixupKind()
295 const Triple &TT = STI.getTargetTriple(); in createPPCAsmBackend() local
296 if (TT.isOSBinFormatXCOFF()) in createPPCAsmBackend()
297 return new XCOFFPPCAsmBackend(T, TT); in createPPCAsmBackend()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCTargetMachine.cpp205 if (TT.getArch() == Triple::ppc64 || TT.getArch() == Triple::ppc64le) { in computeFSAdditions()
226 if (TT.isOSAIX()) { in computeFSAdditions()
237 if (TT.isOSAIX()) in createTLOF()
253 switch (TT.getArch()) { in computeTargetABI()
257 if (TT.isPPC64ELFv2ABI()) in computeTargetABI()
268 if (TT.isOSAIX() && RM && *RM != Reloc::PIC_) in getEffectiveRelocModel()
276 if (TT.getArch() == Triple::ppc64 || TT.isOSAIX()) in getEffectiveRelocModel()
296 if (TT.isOSAIX()) in getEffectivePPCCodeModel()
301 if (TT.isArch32Bit()) in getEffectivePPCCodeModel()
350 : LLVMTargetMachine(T, getDataLayoutString(TT), TT, CPU, in PPCTargetMachine()
[all …]
/freebsd/contrib/llvm-project/lldb/source/Plugins/LanguageRuntime/ObjC/GNUstepObjCRuntime/
H A DGNUstepObjCRuntime.cpp41 const llvm::Triple &TT) { in CanModuleBeGNUstepObjCLibrary() argument
48 if (TT.isOSBinFormatELF()) in CanModuleBeGNUstepObjCLibrary()
50 if (TT.isOSWindows()) in CanModuleBeGNUstepObjCLibrary()
56 const llvm::Triple &TT) { in ScanForGNUstepObjCLibraryCandidate() argument
61 if (CanModuleBeGNUstepObjCLibrary(mod, TT)) in ScanForGNUstepObjCLibraryCandidate()
75 const llvm::Triple &TT = target.GetArchitecture().GetTriple(); in CreateInstance() local
76 if (TT.getVendor() == llvm::Triple::VendorType::Apple) in CreateInstance()
80 if (!ScanForGNUstepObjCLibraryCandidate(images, TT)) in CreateInstance()
83 if (TT.isOSBinFormatELF()) { in CreateInstance()
89 } else if (TT.isOSWindows()) { in CreateInstance()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchTargetMachine.cpp46 static std::string computeDataLayout(const Triple &TT) { in computeDataLayout() argument
47 if (TT.isArch64Bit()) in computeDataLayout()
49 assert(TT.isArch32Bit() && "only LA32 and LA64 are currently supported"); in computeDataLayout()
53 static Reloc::Model getEffectiveRelocModel(const Triple &TT, in getEffectiveRelocModel() argument
59 getEffectiveLoongArchCodeModel(const Triple &TT, in getEffectiveLoongArchCodeModel() argument
69 if (!TT.isArch64Bit()) in getEffectiveLoongArchCodeModel()
79 const Target &T, const Triple &TT, StringRef CPU, StringRef FS, in LoongArchTargetMachine() argument
82 : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options, in LoongArchTargetMachine()
83 getEffectiveRelocModel(TT, RM), in LoongArchTargetMachine()
84 getEffectiveLoongArchCodeModel(TT, CM), OL), in LoongArchTargetMachine()
H A DLoongArchSubtarget.cpp28 const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS, in initializeSubtargetDependencies() argument
30 bool Is64Bit = TT.isArch64Bit(); in initializeSubtargetDependencies()
53 TargetABI = LoongArchABI::computeTargetABI(TT, ABIName); in initializeSubtargetDependencies()
84 LoongArchSubtarget::LoongArchSubtarget(const Triple &TT, StringRef CPU, in LoongArchSubtarget() argument
88 : LoongArchGenSubtargetInfo(TT, CPU, TuneCPU, FS), in LoongArchSubtarget()
90 initializeSubtargetDependencies(TT, CPU, TuneCPU, FS, ABIName)), in LoongArchSubtarget()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMTargetMachine.cpp117 if (TT.isOSBinFormatMachO()) in createTLOF()
119 if (TT.isOSWindows()) in createTLOF()
125 computeTargetABI(const Triple &TT, StringRef CPU, in computeTargetABI() argument
130 ABIName = ARM::computeDefaultTargetABI(TT, CPU); in computeTargetABI()
146 auto ABI = computeTargetABI(TT, CPU, Options); in computeDataLayout()
156 Ret += DataLayout::getManglingComponent(TT); in computeDataLayout()
207 assert(TT.isOSBinFormatELF() && in getEffectiveRelocModel()
211 if (*RM == Reloc::DynamicNoPIC && !TT.isOSDarwin()) in getEffectiveRelocModel()
225 : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT, in ARMBaseTargetMachine()
228 TargetABI(computeTargetABI(TT, CPU, Options)), in ARMBaseTargetMachine()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64TargetMachine.cpp258 if (TT.isOSBinFormatMachO()) in createTLOF()
260 if (TT.isOSBinFormatCOFF()) in createTLOF()
270 if (TT.isOSBinFormatMachO()) { in computeDataLayout()
271 if (TT.getArch() == Triple::aarch64_32) in computeDataLayout()
275 if (TT.isOSBinFormatCOFF()) in computeDataLayout()
284 if (CPU.empty() && TT.isArm64e()) in computeDefaultCPU()
292 if (TT.isOSDarwin() || TT.isOSWindows()) in getEffectiveRelocModel()
320 if (JIT && !TT.isOSWindows()) in getEffectiveAArch64CodeModel()
336 TT, computeDefaultCPU(TT, CPU), FS, Options, in AArch64TargetMachine()
342 if (TT.isOSBinFormatMachO()) { in AArch64TargetMachine()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsMCTargetDesc.cpp49 StringRef MIPS_MC::selectMipsCPU(const Triple &TT, StringRef CPU) { in selectMipsCPU() argument
51 if (TT.getSubArch() == llvm::Triple::MipsSubArch_r6) { in selectMipsCPU()
52 if (TT.isMIPS32()) in selectMipsCPU()
57 if (TT.isMIPS32()) in selectMipsCPU()
72 static MCRegisterInfo *createMipsMCRegisterInfo(const Triple &TT) { in createMipsMCRegisterInfo() argument
78 static MCSubtargetInfo *createMipsMCSubtargetInfo(const Triple &TT, in createMipsMCSubtargetInfo() argument
80 CPU = MIPS_MC::selectMipsCPU(TT, CPU); in createMipsMCSubtargetInfo()
81 return createMipsMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS); in createMipsMCSubtargetInfo()
85 const Triple &TT, in createMipsMCAsmInfo() argument
87 MCAsmInfo *MAI = new MipsMCAsmInfo(TT, Options); in createMipsMCAsmInfo()
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/MCTargetDesc/
H A DSparcMCTargetDesc.cpp44 const Triple &TT, in createSparcMCAsmInfo() argument
46 MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT); in createSparcMCAsmInfo()
54 const Triple &TT, in createSparcV9MCAsmInfo() argument
56 MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT); in createSparcV9MCAsmInfo()
69 static MCRegisterInfo *createSparcMCRegisterInfo(const Triple &TT) { in createSparcMCRegisterInfo() argument
76 createSparcMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) { in createSparcMCSubtargetInfo() argument
78 CPU = (TT.getArch() == Triple::sparcv9) ? "v9" : "v8"; in createSparcMCSubtargetInfo()
79 return createSparcMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS); in createSparcMCSubtargetInfo()
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/MCTargetDesc/
H A DXtensaMCTargetDesc.cpp35 const Triple &TT, in createXtensaMCAsmInfo() argument
37 MCAsmInfo *MAI = new XtensaMCAsmInfo(TT); in createXtensaMCAsmInfo()
47 static MCInstPrinter *createXtensaMCInstPrinter(const Triple &TT, in createXtensaMCInstPrinter() argument
55 static MCRegisterInfo *createXtensaMCRegisterInfo(const Triple &TT) { in createXtensaMCRegisterInfo() argument
62 createXtensaMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) { in createXtensaMCSubtargetInfo() argument
63 return createXtensaMCSubtargetInfoImpl(TT, CPU, CPU, FS); in createXtensaMCSubtargetInfo()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/MCTargetDesc/
H A DM68kMCTargetDesc.cpp44 static std::string ParseM68kTriple(const Triple &TT, StringRef CPU) { in ParseM68kTriple() argument
54 static MCRegisterInfo *createM68kMCRegisterInfo(const Triple &TT) { in createM68kMCRegisterInfo() argument
60 static MCSubtargetInfo *createM68kMCSubtargetInfo(const Triple &TT, in createM68kMCSubtargetInfo() argument
62 std::string ArchFS = ParseM68kTriple(TT, CPU); in createM68kMCSubtargetInfo()
70 return createM68kMCSubtargetInfoImpl(TT, CPU, /*TuneCPU=*/CPU, ArchFS); in createM68kMCSubtargetInfo()
74 const Triple &TT, in createM68kMCAsmInfo() argument
76 MCAsmInfo *MAI = new M68kELFMCAsmInfo(TT); in createM68kMCAsmInfo()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600Subtarget.cpp25 R600Subtarget::R600Subtarget(const Triple &TT, StringRef GPU, StringRef FS, in R600Subtarget() argument
27 : R600GenSubtargetInfo(TT, GPU, /*TuneCPU*/ GPU, FS), AMDGPUSubtarget(TT), in R600Subtarget()
30 TLInfo(TM, initializeSubtargetDependencies(TT, GPU, FS)), in R600Subtarget()
35 R600Subtarget &R600Subtarget::initializeSubtargetDependencies(const Triple &TT, in initializeSubtargetDependencies() argument
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaTargetMachine.cpp31 static std::string computeDataLayout(const Triple &TT, StringRef CPU, in computeDataLayout() argument
45 XtensaTargetMachine::XtensaTargetMachine(const Target &T, const Triple &TT, in XtensaTargetMachine() argument
52 : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, IsLittle), TT, in XtensaTargetMachine()
59 XtensaTargetMachine::XtensaTargetMachine(const Target &T, const Triple &TT, in XtensaTargetMachine() argument
65 : XtensaTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {} in XtensaTargetMachine()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsTargetMachine.cpp73 static std::string computeDataLayout(const Triple &TT, StringRef CPU, in computeDataLayout() argument
77 MipsABIInfo ABI = MipsABIInfo::computeTargetABI(TT, CPU, Options.MCOptions); in computeDataLayout()
121 MipsTargetMachine::MipsTargetMachine(const Target &T, const Triple &TT, in MipsTargetMachine() argument
128 : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT, in MipsTargetMachine()
132 ABI(MipsABIInfo::computeTargetABI(TT, CPU, Options.MCOptions)), in MipsTargetMachine()
134 DefaultSubtarget(TT, CPU, FS, isLittle, *this, std::nullopt), in MipsTargetMachine()
137 Mips16Subtarget(TT, CPU, FS.empty() ? "+mips16" : FS.str() + ",+mips16", in MipsTargetMachine()
150 MipsebTargetMachine::MipsebTargetMachine(const Target &T, const Triple &TT, in MipsebTargetMachine() argument
156 : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {} in MipsebTargetMachine()
160 MipselTargetMachine::MipselTargetMachine(const Target &T, const Triple &TT, in MipselTargetMachine() argument
[all …]
/freebsd/contrib/llvm-project/llvm/lib/MC/MCDisassembler/
H A DDisassembler.cpp45 LLVMCreateDisasmCPUFeatures(const char *TT, const char *CPU, in LLVMCreateDisasmCPUFeatures() argument
51 const Target *TheTarget = TargetRegistry::lookupTarget(TT, Error); in LLVMCreateDisasmCPUFeatures()
55 std::unique_ptr<const MCRegisterInfo> MRI(TheTarget->createMCRegInfo(TT)); in LLVMCreateDisasmCPUFeatures()
62 TheTarget->createMCAsmInfo(*MRI, TT, MCOptions)); in LLVMCreateDisasmCPUFeatures()
71 TheTarget->createMCSubtargetInfo(TT, CPU, Features)); in LLVMCreateDisasmCPUFeatures()
77 new MCContext(Triple(TT), MAI.get(), MRI.get(), STI.get())); in LLVMCreateDisasmCPUFeatures()
88 TheTarget->createMCRelocationInfo(TT, *Ctx)); in LLVMCreateDisasmCPUFeatures()
93 TT, GetOpInfo, SymbolLookUp, DisInfo, Ctx.get(), std::move(RelInfo))); in LLVMCreateDisasmCPUFeatures()
99 Triple(TT), AsmPrinterVariant, *MAI, *MII, *MRI)); in LLVMCreateDisasmCPUFeatures()
122 LLVMDisasmContextRef LLVMCreateDisasm(const char *TT, void *DisInfo, in LLVMCreateDisasm() argument
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/
H A DTargetMachine.cpp33 const Triple &TT, StringRef CPU, StringRef FS, in TargetMachine() argument
35 : TheTarget(T), DL(DataLayoutString), TargetTriple(TT), in TargetMachine()
159 const Triple &TT = getTargetTriple(); in shouldAssumeDSOLocal() local
177 if (TT.isOSBinFormatCOFF()) { in shouldAssumeDSOLocal()
187 if (TT.isWindowsGNUEnvironment() && GV->isDeclarationForLinker() && in shouldAssumeDSOLocal()
201 if (TT.isOSBinFormatGOFF()) in shouldAssumeDSOLocal()
204 if (TT.isOSBinFormatMachO()) { in shouldAssumeDSOLocal()
210 assert(TT.isOSBinFormatELF() || TT.isOSBinFormatWasm() || in shouldAssumeDSOLocal()
211 TT.isOSBinFormatXCOFF()); in shouldAssumeDSOLocal()
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcTargetMachine.cpp98 SparcTargetMachine::SparcTargetMachine(const Target &T, const Triple &TT, in SparcTargetMachine() argument
105 : LLVMTargetMachine(T, computeDataLayout(TT, is64bit), TT, CPU, FS, Options, in SparcTargetMachine()
200 SparcV8TargetMachine::SparcV8TargetMachine(const Target &T, const Triple &TT, in SparcV8TargetMachine() argument
206 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {} in SparcV8TargetMachine()
210 SparcV9TargetMachine::SparcV9TargetMachine(const Target &T, const Triple &TT, in SparcV9TargetMachine() argument
216 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {} in SparcV9TargetMachine()
220 SparcelTargetMachine::SparcelTargetMachine(const Target &T, const Triple &TT, in SparcelTargetMachine() argument
226 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {} in SparcelTargetMachine()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kSubtarget.cpp42 static StringRef selectM68kCPU(Triple TT, StringRef CPU) { in selectM68kCPU() argument
51 M68kSubtarget::M68kSubtarget(const Triple &TT, StringRef CPU, StringRef FS, in M68kSubtarget() argument
53 : M68kGenSubtargetInfo(TT, CPU, /*TuneCPU*/ CPU, FS), TM(TM), TSInfo(), in M68kSubtarget()
54 InstrInfo(initializeSubtargetDependencies(CPU, TT, FS, TM)), in M68kSubtarget()
56 TargetTriple(TT) { in M68kSubtarget()
88 StringRef CPU, Triple TT, StringRef FS, const M68kTargetMachine &TM) { in initializeSubtargetDependencies() argument
89 std::string CPUName = selectM68kCPU(TT, CPU).str(); in initializeSubtargetDependencies()
H A DM68kTargetMachine.cpp48 std::string computeDataLayout(const Triple &TT, StringRef CPU, in computeDataLayout() argument
77 Reloc::Model getEffectiveRelocModel(const Triple &TT, in getEffectiveRelocModel() argument
99 M68kTargetMachine::M68kTargetMachine(const Target &T, const Triple &TT, in M68kTargetMachine() argument
105 : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS, in M68kTargetMachine()
106 Options, getEffectiveRelocModel(TT, RM), in M68kTargetMachine()
109 Subtarget(TT, CPU, FS, *this) { in M68kTargetMachine()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVSubtarget.cpp71 RISCVSubtarget::initializeSubtargetDependencies(const Triple &TT, StringRef CPU, in initializeSubtargetDependencies() argument
75 bool Is64Bit = TT.isArch64Bit(); in initializeSubtargetDependencies()
89 TargetABI = RISCVABI::computeTargetABI(TT, getFeatureBits(), ABIName); in initializeSubtargetDependencies()
90 RISCVFeatures::validate(TT, getFeatureBits()); in initializeSubtargetDependencies()
94 RISCVSubtarget::RISCVSubtarget(const Triple &TT, StringRef CPU, in RISCVSubtarget() argument
99 : RISCVGenSubtargetInfo(TT, CPU, TuneCPU, FS), in RISCVSubtarget()
102 initializeSubtargetDependencies(TT, CPU, TuneCPU, FS, ABIName)), in RISCVSubtarget()
/freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/JITLink/
H A DELF_aarch32.cpp220 : ELFLinkGraphBuilder<ELFT>(Obj, std::move(TT), std::move(Features), in ELFLinkGraphBuilder_aarch32()
253 auto TT = (*ELFObj)->makeTriple(); in createLinkGraphFromELFObject_aarch32() local
254 ARM::ArchKind AK = ARM::parseArch(TT.getArchName()); in createLinkGraphFromELFObject_aarch32()
266 switch (TT.getArch()) { in createLinkGraphFromELFObject_aarch32()
271 (*ELFObj)->getFileName(), ELFFile, TT, std::move(*Features), in createLinkGraphFromELFObject_aarch32()
279 (*ELFObj)->getFileName(), ELFFile, TT, std::move(*Features), in createLinkGraphFromELFObject_aarch32()
286 TT.getTriple()); in createLinkGraphFromELFObject_aarch32()
292 const Triple &TT = G->getTargetTriple(); in link_ELF_aarch32() local
295 ARM::ArchKind AK = ARM::parseArch(TT.getArchName()); in link_ELF_aarch32()
300 if (Ctx->shouldAddDefaultTargetPasses(TT)) { in link_ELF_aarch32()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/Orc/
H A DJITTargetMachineBuilder.cpp18 JITTargetMachineBuilder::JITTargetMachineBuilder(Triple TT) in JITTargetMachineBuilder() argument
19 : TT(std::move(TT)) { in JITTargetMachineBuilder()
44 auto *TheTarget = TargetRegistry::lookupTarget(TT.getTriple(), ErrMsg); in createTargetMachine()
53 TheTarget->createTargetMachine(TT.getTriple(), CPU, Features.getString(), in createTargetMachine()
72 << Indent << " Triple = \"" << JTMB.TT.str() << "\"\n" in print()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/MCTargetDesc/
H A DARCMCTargetDesc.cpp44 static MCRegisterInfo *createARCMCRegisterInfo(const Triple &TT) { in createARCMCRegisterInfo() argument
50 static MCSubtargetInfo *createARCMCSubtargetInfo(const Triple &TT, in createARCMCSubtargetInfo() argument
52 return createARCMCSubtargetInfoImpl(TT, CPU, /*TuneCPU=*/CPU, FS); in createARCMCSubtargetInfo()
56 const Triple &TT, in createARCMCAsmInfo() argument
58 MCAsmInfo *MAI = new ARCMCAsmInfo(TT); in createARCMCAsmInfo()
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/MCTargetDesc/
H A DCSKYMCTargetDesc.cpp41 const Triple &TT, in createCSKYMCAsmInfo() argument
43 MCAsmInfo *MAI = new CSKYMCAsmInfo(TT); in createCSKYMCAsmInfo()
66 static MCRegisterInfo *createCSKYMCRegisterInfo(const Triple &TT) { in createCSKYMCRegisterInfo() argument
72 static MCSubtargetInfo *createCSKYMCSubtargetInfo(const Triple &TT, in createCSKYMCSubtargetInfo() argument
77 return createCSKYMCSubtargetInfoImpl(TT, CPUName, /*TuneCPU=*/CPUName, FS); in createCSKYMCSubtargetInfo()
82 const Triple &TT = STI.getTargetTriple(); in createCSKYObjectTargetStreamer() local
83 if (TT.isOSBinFormatELF()) in createCSKYObjectTargetStreamer()

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