| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVCallLowering.cpp | 38 if (VRegs.size() > 1) in lowerReturn()
43 .addUse(VRegs[0]) in lowerReturn()
273 if (VRegs.size() > 0) { in lowerFormalArguments()
278 if (VRegs[i].size() > 1) in lowerFormalArguments()
289 buildOpDecorate(VRegs[i][0], MIRBuilder, in lowerFormalArguments()
301 buildOpDecorate(VRegs[i][0], MIRBuilder, in lowerFormalArguments()
307 buildOpDecorate(VRegs[i][0], MIRBuilder, in lowerFormalArguments()
313 buildOpDecorate(VRegs[i][0], MIRBuilder, in lowerFormalArguments()
371 MRI->setRegClass(VRegs[i][0], &SPIRV::IDRegClass); in lowerFormalArguments()
373 .addDef(VRegs[i][0]) in lowerFormalArguments()
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| H A D | SPIRVCallLowering.h | 34 ArrayRef<Register> VRegs, FunctionLoweringInfo &FLI,
39 ArrayRef<ArrayRef<Register>> VRegs,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/GISel/ |
| H A D | BPFCallLowering.cpp | 27 const Value *Val, ArrayRef<Register> VRegs, in lowerReturn() argument
30 if (!VRegs.empty()) in lowerReturn()
38 ArrayRef<ArrayRef<Register>> VRegs, in lowerFormalArguments() argument
40 return VRegs.empty(); in lowerFormalArguments()
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| H A D | BPFCallLowering.h | 29 ArrayRef<Register> VRegs, FunctionLoweringInfo &FLI,
32 ArrayRef<ArrayRef<Register>> VRegs,
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | SwiftErrorValueTracking.cpp | 181 SmallVector<std::pair<MachineBasicBlock *, Register>, 4> VRegs; in propagateVRegs() local
186 VRegs.push_back(std::make_pair( in propagateVRegs()
204 VRegs.size() >= 1 && in propagateVRegs()
206 VRegs, in propagateVRegs()
208 -> bool { return V.second != VRegs[0].second; }); in propagateVRegs()
213 assert(!VRegs.empty() && in propagateVRegs()
216 setCurrentVReg(MBB, SwiftErrorVal, VRegs[0].second); in propagateVRegs()
228 assert(!VRegs.empty() && in propagateVRegs()
233 .addReg(VRegs[0].second); in propagateVRegs()
246 for (auto BBRegPair : VRegs) { in propagateVRegs()
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| H A D | MIRVRegNamerUtils.cpp | 37 VRegRenamer::getVRegRenameMap(const std::vector<NamedVReg> &VRegs) { in getVRegRenameMap() argument
49 for (const auto &VReg : VRegs) { in getVRegRenameMap()
148 std::vector<NamedVReg> VRegs; in renameInstsInMBB() local
161 VRegs.push_back( in renameInstsInMBB()
165 return VRegs.size() ? doVRegRenaming(getVRegRenameMap(VRegs)) : false; in renameInstsInMBB()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMCallLowering.h | 35 ArrayRef<Register> VRegs,
39 ArrayRef<ArrayRef<Register>> VRegs,
47 ArrayRef<Register> VRegs,
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| H A D | ARMCallLowering.cpp | 184 const Value *Val, ArrayRef<Register> VRegs, in lowerReturnVal() argument
198 ArgInfo OrigRetInfo(VRegs, Val->getType(), 0); in lowerReturnVal()
215 const Value *Val, ArrayRef<Register> VRegs, in lowerReturn() argument
217 assert(!Val == VRegs.empty() && "Return value without a vreg"); in lowerReturn()
223 if (!lowerReturnVal(MIRBuilder, Val, VRegs, Ret)) in lowerReturn()
367 ArrayRef<ArrayRef<Register>> VRegs, in lowerFormalArguments() argument
402 ArgInfo OrigArgInfo(VRegs[Idx], Arg.getType(), Idx); in lowerFormalArguments()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.h | 38 ArrayRef<Register> VRegs, MachineInstrBuilder &Ret) const;
44 ArrayRef<Register> VRegs,
48 ArrayRef<ArrayRef<Register>> VRegs) const;
51 ArrayRef<ArrayRef<Register>> VRegs,
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| H A D | AMDGPUCallLowering.cpp | 318 assert(VRegs.size() == SplitEVTs.size() && in lowerReturnVal()
325 Register Reg = VRegs[i]; in lowerReturnVal()
391 else if (!lowerReturnVal(B, Val, VRegs, Ret)) in lowerReturn()
512 ArrayRef<ArrayRef<Register>> VRegs) const { in lowerFormalArgumentsKernel()
555 assert(VRegs[i].size() == 1 && in lowerFormalArgumentsKernel()
558 lowerParameterPtr(VRegs[i][0], B, ArgOffset); in lowerFormalArgumentsKernel()
564 B.buildAddrSpaceCast(VRegs[i][0], PtrReg); in lowerFormalArgumentsKernel()
567 ArgInfo OrigArg(VRegs[i], Arg, i); in lowerFormalArgumentsKernel()
590 return lowerFormalArgumentsKernel(B, F, VRegs); in lowerFormalArguments()
653 for (Register R : VRegs[Idx]) in lowerFormalArguments()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVCallLowering.h | 32 ArrayRef<Register> VRegs,
36 ArrayRef<ArrayRef<Register>> VRegs,
44 ArrayRef<Register> VRegs, MachineInstrBuilder &Ret) const;
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| H A D | RISCVCallLowering.cpp | 384 ArrayRef<Register> VRegs, in lowerReturnVal() argument
399 ArgInfo OrigRetInfo(VRegs, Val->getType(), 0); in lowerReturnVal()
414 const Value *Val, ArrayRef<Register> VRegs, in lowerReturn() argument
416 assert(!Val == VRegs.empty() && "Return value without a vreg"); in lowerReturn()
419 if (!lowerReturnVal(MIRBuilder, Val, VRegs, Ret)) in lowerReturn()
496 ArrayRef<ArrayRef<Register>> VRegs, in lowerFormalArguments() argument
519 ArgInfo AInfo(VRegs[Index], Arg.getType(), Index); in lowerFormalArguments()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86CallLowering.cpp | 144 const Value *Val, ArrayRef<Register> VRegs, in lowerReturn() argument
146 assert(((Val && !VRegs.empty()) || (!Val && VRegs.empty())) && in lowerReturn()
154 insertSRetStores(MIRBuilder, Val->getType(), VRegs, FLI.DemoteRegister); in lowerReturn()
156 } else if (!VRegs.empty()) { in lowerReturn()
161 ArgInfo OrigRetInfo(VRegs, Val->getType(), 0); in lowerReturn()
256 ArrayRef<ArrayRef<Register>> VRegs, in lowerFormalArguments() argument
279 Arg.hasAttribute(Attribute::Nest) || VRegs[Idx].size() > 1) in lowerFormalArguments()
282 ArgInfo OrigArg(VRegs[Idx], Arg.getType(), Idx); in lowerFormalArguments()
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| H A D | X86CallLowering.h | 30 ArrayRef<Register> VRegs,
34 ArrayRef<ArrayRef<Register>> VRegs,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCCallLowering.cpp | 75 const Value *Val, ArrayRef<Register> VRegs, in lowerReturn() argument
84 if (!VRegs.empty()) { in lowerReturn()
86 ArgInfo OrigArg{VRegs, Val->getType(), 0}; in lowerReturn()
116 ArrayRef<ArrayRef<Register>> VRegs, in lowerFormalArguments() argument
130 ArgInfo OrigArg{VRegs[I], Arg, I}; in lowerFormalArguments()
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| H A D | PPCCallLowering.h | 30 ArrayRef<Register> VRegs, FunctionLoweringInfo &FLI,
33 ArrayRef<ArrayRef<Register>> VRegs,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.h | 28 ArrayRef<Register> VRegs,
32 ArrayRef<ArrayRef<Register>> VRegs,
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| H A D | MipsCallLowering.cpp | 316 const Value *Val, ArrayRef<Register> VRegs, in lowerReturn() argument
324 if (!VRegs.empty()) { in lowerReturn()
332 ArgInfo ArgRetInfo(VRegs, *Val, 0); in lowerReturn()
360 ArrayRef<ArrayRef<Register>> VRegs, in lowerFormalArguments() argument
379 ArgInfo AInfo(VRegs[i], Arg, i); in lowerFormalArguments()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | CallLowering.h | 454 ArrayRef<Register> VRegs, Register DemoteReg,
460 ArrayRef<Register> VRegs, Register DemoteReg) const;
512 ArrayRef<Register> VRegs, FunctionLoweringInfo &FLI, in lowerReturn() argument
516 return lowerReturn(MIRBuilder, Val, VRegs, FLI); in lowerReturn()
524 ArrayRef<Register> VRegs, in lowerReturn() argument
545 ArrayRef<ArrayRef<Register>> VRegs, in lowerFormalArguments() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/GISel/ |
| H A D | M68kCallLowering.h | 35 ArrayRef<Register> VRegs, FunctionLoweringInfo &FLI,
39 ArrayRef<ArrayRef<Register>> VRegs,
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| H A D | M68kCallLowering.cpp | 94 const Value *Val, ArrayRef<Register> VRegs, in lowerReturn() argument
107 if (!VRegs.empty()) { in lowerReturn()
109 ArgInfo OrigArg{VRegs, Val->getType(), 0}; in lowerReturn()
124 ArrayRef<ArrayRef<Register>> VRegs, in lowerFormalArguments() argument
134 ArgInfo OrigArg{VRegs[I], Arg.getType(), I}; in lowerFormalArguments()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.h | 35 ArrayRef<Register> VRegs, FunctionLoweringInfo &FLI,
45 ArrayRef<ArrayRef<Register>> VRegs,
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| H A D | AArch64CallLowering.cpp | 353 ArrayRef<Register> VRegs, in lowerReturn() argument
357 assert(((Val && !VRegs.empty()) || (!Val && VRegs.empty())) && in lowerReturn()
362 insertSRetStores(MIRBuilder, Val->getType(), VRegs, FLI.DemoteRegister); in lowerReturn()
363 } else if (!VRegs.empty()) { in lowerReturn()
376 assert(VRegs.size() == SplitEVTs.size() && in lowerReturn()
383 Register CurVReg = VRegs[i]; in lowerReturn()
634 ArrayRef<ArrayRef<Register>> VRegs, FunctionLoweringInfo &FLI) const { in lowerFormalArguments() argument
667 ArgInfo OrigArg{VRegs[i], Arg, i}; in lowerFormalArguments()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | Utils.cpp | 481 SmallVectorImpl<Register> &VRegs, in extractParts() argument
485 VRegs.push_back(MRI.createGenericVirtualRegister(Ty)); in extractParts()
486 MIRBuilder.buildUnmerge(VRegs, Reg); in extractParts()
490 SmallVectorImpl<Register> &VRegs, in extractParts() argument
505 MIRBuilder.buildUnmerge(VRegs, Reg); in extractParts()
541 VRegs.push_back( in extractParts()
560 VRegs.push_back(RegPieces[i]); in extractParts()
570 VRegs.push_back(NewReg); in extractParts()
585 SmallVectorImpl<Register> &VRegs, in extractVectorParts() argument
617 VRegs.push_back(Elts[Offset]); in extractVectorParts()
[all …]
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| H A D | IRTranslator.cpp | 213 auto *VRegs = VMap.getVRegs(Val); in getOrCreateVRegs() local
226 return *VRegs; in getOrCreateVRegs()
247 return *VRegs; in getOrCreateVRegs()
251 return *VRegs; in getOrCreateVRegs()
367 ArrayRef<Register> VRegs; in translateRet() local
369 VRegs = getOrCreateVRegs(*Ret); in translateRet()
2000 if (VRegs.size() != 1) in getArgPhysReg()
2218 MIRBuilder.buildFFrexp(VRegs[0], VRegs[1], in translateKnownIntrinsic()
2622 if (VRegs.size() > 1) in translateCall()
2624 MIB.addUse(VRegs[0]); in translateCall()
[all …]
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