Searched refs:XHCI_PS_PLS_SET (Results 1 – 3 of 3) sorted by relevance
123 #define XHCI_PS_PLS_SET(x) (((x) & 0xF) << 5) /* RW - port link state */ macro
3407 XHCI_PS_PLS_SET(0xF) | XHCI_PS_LWS); in xhci_roothub_exec()3415 XHCI_PS_PLS_SET(0) | XHCI_PS_LWS); in xhci_roothub_exec()3578 XHCI_PS_PLS_SET(i) | XHCI_PS_LWS); in xhci_roothub_exec()3594 XHCI_PS_PLS_SET(i ? 2 /* LPM */ : 3) | XHCI_PS_LWS); in xhci_roothub_exec()
410 XHCI_PS_PLS_SET(UPS_PORT_LS_POLL); in pci_xhci_usbcmd_write()413 XHCI_PS_PLS_SET(UPS_PORT_LS_U0); in pci_xhci_usbcmd_write()535 p->portsc |= XHCI_PS_PLS_SET(newpls) | in pci_xhci_portregs_write()2582 port->portsc |= XHCI_PS_PLS_SET(UPS_PORT_LS_POLL) | in pci_xhci_init_port()2585 port->portsc |= XHCI_PS_PLS_SET(UPS_PORT_LS_U0) | in pci_xhci_init_port()2592 port->portsc = XHCI_PS_PLS_SET(UPS_PORT_LS_RX_DET) | XHCI_PS_PP; in pci_xhci_init_port()2632 p->portsc |= XHCI_PS_PLS_SET(UPS_PORT_LS_RESUME); in pci_xhci_dev_intr()