/freebsd/contrib/llvm-project/compiler-rt/lib/tsan/rtl/ |
H A D | tsan_interface.h | 236 a16 __tsan_atomic16_load(const volatile a16 *a, morder mo); 262 a16 __tsan_atomic16_exchange(volatile a16 *a, a16 v, morder mo); 275 a16 __tsan_atomic16_fetch_add(volatile a16 *a, a16 v, morder mo); 288 a16 __tsan_atomic16_fetch_sub(volatile a16 *a, a16 v, morder mo); 301 a16 __tsan_atomic16_fetch_and(volatile a16 *a, a16 v, morder mo); 314 a16 __tsan_atomic16_fetch_or(volatile a16 *a, a16 v, morder mo); 327 a16 __tsan_atomic16_fetch_xor(volatile a16 *a, a16 v, morder mo); 340 a16 __tsan_atomic16_fetch_nand(volatile a16 *a, a16 v, morder mo); 354 int __tsan_atomic16_compare_exchange_strong(volatile a16 *a, a16 *c, a16 v, 372 int __tsan_atomic16_compare_exchange_weak(volatile a16 *a, a16 *c, a16 v, [all …]
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H A D | tsan_interface_atomic.cpp | 503 a16 __tsan_atomic16_load(const volatile a16 *a, morder mo) { in __tsan_atomic16_load() 557 a16 __tsan_atomic16_exchange(volatile a16 *a, a16 v, morder mo) { in __tsan_atomic16_exchange() 584 a16 __tsan_atomic16_fetch_add(volatile a16 *a, a16 v, morder mo) { in __tsan_atomic16_fetch_add() 611 a16 __tsan_atomic16_fetch_sub(volatile a16 *a, a16 v, morder mo) { in __tsan_atomic16_fetch_sub() 638 a16 __tsan_atomic16_fetch_and(volatile a16 *a, a16 v, morder mo) { in __tsan_atomic16_fetch_and() 665 a16 __tsan_atomic16_fetch_or(volatile a16 *a, a16 v, morder mo) { in __tsan_atomic16_fetch_or() 692 a16 __tsan_atomic16_fetch_xor(volatile a16 *a, a16 v, morder mo) { in __tsan_atomic16_fetch_xor() 719 a16 __tsan_atomic16_fetch_nand(volatile a16 *a, a16 v, morder mo) { in __tsan_atomic16_fetch_nand() 747 int __tsan_atomic16_compare_exchange_strong(volatile a16 *a, a16 *c, a16 v, in __tsan_atomic16_compare_exchange_strong() 779 int __tsan_atomic16_compare_exchange_weak(volatile a16 *a, a16 *c, a16 v, in __tsan_atomic16_compare_exchange_weak() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | MIMGInstructions.td | 518 #"$dmask$dim$unorm$cpol$r128$a16$tfe$lwe" 1136 #"$cpol$r128$a16$tfe$lwe" 1150 #"$cpol$r128$a16$tfe$lwe" 1163 #"$cpol$r128$a16$tfe$lwe" 1178 #"$cpol$r128$a16$tfe$lwe" 1421 let AsmString = opcode#" $vdata, $vaddr0, $srsrc$a16"; 1429 let AsmString = opcode#" $vdata, "#nsah.AddrAsm#", $srsrc$a16"; 1435 let AsmString = opcode#" $vdata, $vaddr0, $srsrc$a16"; 1445 let AsmString = opcode#" $vdata, "#nsah.AddrAsm#", $srsrc$a16"; 1453 let AsmString = opcode#" $vdata, "#nsah.AddrAsm#", $rsrc$a16"; [all …]
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H A D | SIInstrFormats.td | 393 bits<1> a16; 402 let Inst{62} = a16; 416 bits<1> a16; 429 let Inst{16} = a16; 446 bits<1> a16; 459 let Inst{6} = a16;
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H A D | AMDGPU.td | 499 def FeatureR128A16 : SubtargetFeature<"r128-a16", 502 …"Support gfx9-style A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands, where a16 i… 505 def FeatureA16 : SubtargetFeature<"a16",
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H A D | SIInstrInfo.td | 582 // SDNodes PatFrags for a16 loads and stores with 3 components. 1070 def A16 : NamedBitOperand<"a16">;
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H A D | SILoadStoreOptimizer.cpp | 896 AMDGPU::OpName::r128, AMDGPU::OpName::a16}; in dmasksCanBeCombined()
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H A D | SIInstrInfo.cpp | 5041 const MachineOperand *A16 = getNamedOperand(MI, AMDGPU::OpName::a16); in verifyInstruction()
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/freebsd/sys/contrib/zstd/zlibWrapper/ |
H A D | gzwrite.c | 472 a11, a12, a13, a14, a15, a16, a17, a18, a19, a20) in gzprintf() argument 476 a11, a12, a13, a14, a15, a16, a17, a18, a19, a20; 518 a13, a14, a15, a16, a17, a18, a19, a20); 524 a12, a13, a14, a15, a16, a17, a18, a19, a20); 529 a10, a11, a12, a13, a14, a15, a16, a17, a18, a19, a20); 533 a9, a10, a11, a12, a13, a14, a15, a16, a17, a18, a19, a20);
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/freebsd/sys/contrib/zlib/ |
H A D | gzwrite.c | 446 int a11, int a12, int a13, int a14, int a15, int a16, in gzprintf() argument 488 a13, a14, a15, a16, a17, a18, a19, a20); in gzprintf() 494 a12, a13, a14, a15, a16, a17, a18, a19, a20); in gzprintf() 499 a10, a11, a12, a13, a14, a15, a16, a17, a18, a19, a20); in gzprintf() 503 a9, a10, a11, a12, a13, a14, a15, a16, a17, a18, a19, a20); in gzprintf()
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/freebsd/sys/dev/psci/ |
H A D | smccc.h | 111 register_t a16; member
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/freebsd/contrib/bc/tests/bc/errors/ |
H A D | 34.txt | 142 a16[0] 293 a16[0]
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H A D | 11.txt | 132 a16[0] = 0
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/freebsd/lib/msun/ld128/ |
H A D | e_lgammal_r.c | 52 a16 = 4.48993286185740853170657139487620560e-07L, variable 273 p1 = a0+z*(a2+z*(a4+z*(a6+z*(a8+z*(a10+z*(a12+z*(a14+z*(a16+ in lgammal_r()
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/freebsd/contrib/bc/tests/bc/scripts/ |
H A D | afl1.bc | 142 a16[0]
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H A D | references.bc | 132 a16[0] = 0
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/freebsd/contrib/netbsd-tests/ipf/expected/ |
H A D | ni5 | 61 4500 003d 0010 4000 ff06 02db 0101 0101 96cb e002 8032 0015 bd6b ca12 3786 78d5 5018 269c 4a16 0000…
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/freebsd/sys/contrib/device-tree/src/arm/nvidia/ |
H A D | tegra30-colibri.dtsi | 502 gmi-a16-pj7 {
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H A D | tegra30-apalis-v1.1.dtsi | 126 gmi-a16-pj7 {
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H A D | tegra30-apalis.dtsi | 125 gmi-a16-pj7 {
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64.td | 1146 def TuneAppleA16 : SubtargetFeature<"apple-a16", "ARMProcFamily", "AppleA16", 1686 def : ProcessorModel<"apple-a16", CycloneModel, ProcessorFeatures.AppleA16,
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/ |
H A D | AMDGPUDisassembler.cpp | 1071 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::a16); in convertMIMGInst()
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/freebsd/crypto/heimdal/doc/ |
H A D | layman.asc | 1063 2a16. The encoding of 840 = 6 * 128 + 4816 is 86 48 and the
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
H A D | AMDGPUAsmParser.cpp | 3753 int A16Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::a16); in validateMIMGAddrSize()
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/freebsd/share/misc/ |
H A D | pci_vendors | 2104 5a16 RD890/RD9x0/RX980 PCI to PCI bridge (PCI Express GFX port 0) 22596 1186 3a16 AirPlus G DWL-G510 Wireless PCI Adapter(rev.B) 26771 2a16 Cloud Intelligent Inference Controller 28566 0a16 Haswell-ULT Integrated Graphics Controller 33509 2a16 Mobile GME965/GLE960 PT IDER Controller 34343 3a16 82801JIR (ICH10R) LPC Interface Controller
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