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Searched refs:addDef (Results 1 – 25 of 59) sorted by relevance

123

/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVGlobalRegistry.cpp182 .addDef(Res) in getOrCreateConstInt()
187 .addDef(Res) in getOrCreateConstInt()
225 .addDef(Res) in buildConstantInt()
231 .addDef(Res) in buildConstantInt()
263 .addDef(Res) in buildConstantFP()
433 .addDef(Res) in getOrCreateConstNullPtr()
607 .addDef(Reg) in getOpTypePointer()
865 .addDef(ResVReg) in getOrCreateOpTypeImage()
895 .addDef(ResVReg) in getOrCreateOpTypePipe()
920 .addDef(ResVReg) in getOrCreateOpTypeSampledImage()
[all …]
H A DSPIRVInstructionSelector.cpp544 .addDef(ResVReg) in selectUnOpWithSrc()
659 .addDef(VarReg) in selectMemOperation()
700 .addDef(ResVReg) in selectAtomicRMW()
960 .addDef(ResVReg) in selectBitreverse()
1005 .addDef(ResVReg) in selectCmp()
1111 .addDef(ResVReg) in selectSelect()
1167 .addDef(ResVReg) in selectIntToBool()
1223 .addDef(ResVReg) in selectOpUndef()
1281 .addDef(ResVReg) in selectInsertElt()
1296 .addDef(ResVReg) in selectExtractElt()
[all …]
H A DSPIRVBuiltins.cpp501 .addDef(Call->ReturnRegister) in buildAtomicLoadInst()
621 .addDef(Tmp) in buildAtomicCompareExchangeInst()
658 .addDef(Call->ReturnRegister) in buildAtomicRMWInst()
692 MIB.addDef(Call->ReturnRegister) in buildAtomicFlagInst()
1104 .addDef(Call->ReturnRegister) in generateDotOrFMulInst()
1218 .addDef(Call->ReturnRegister) in generateImageMiscQueryInst()
1286 .addDef(SampledImage) in generateReadImageInst()
1375 .addDef(SampledImage) in generateSampleImageInst()
1513 .addDef(GlobalWorkSize) in buildNDRange()
1527 .addDef(TmpReg) in buildNDRange()
[all …]
H A DSPIRVCallLowering.cpp362 .addDef(FuncVReg) in lowerFormalArguments()
373 .addDef(VRegs[i][0]) in lowerFormalArguments()
480 .addDef(ResVReg) in lowerCall()
H A DSPIRVPreLegalizer.cpp242 .addDef(Reg) in insertAssignInstr()
385 MIB.buildInstr(IdOpInfo.second).addDef(IdOpInfo.first).addUse(Op.getReg()); in processInstr()
H A DSPIRVLegalizerInfo.cpp287 .addDef(ConvReg) in convertPtrToInt()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsInstructionSelector.cpp276 .addDef(Dest) in buildUnalignedLoad()
326 .addDef(PseudoMULTuReg) in select()
375 .addDef(JTIndex) in select()
392 .addDef(Dest) in select()
404 .addDef(Dest) in select()
482 .addDef(ImplDef); in select()
519 .addDef(HILOReg) in select()
577 .addDef(Dst); in select()
652 .addDef(ResultInFPR) in select()
873 .addDef(TrueInReg) in select()
[all …]
H A DMipsISelLowering.cpp4786 .addDef(Temp) in emitLDR_W()
4833 .addDef(Temp) in emitLDR_D()
4842 .addDef(Lo) in emitLDR_D()
4846 .addDef(Hi) in emitLDR_D()
4918 .addDef(Tmp) in emitSTR_W()
4930 .addDef(Tmp) in emitSTR_W()
4971 .addDef(Lo) in emitSTR_D()
4986 .addDef(Lo) in emitSTR_D()
4990 .addDef(Hi) in emitSTR_D()
5010 .addDef(Lo) in emitSTR_D()
[all …]
H A DMipsCallLowering.cpp123 MIB.addDef(PhysReg, RegState::Implicit); in markPhysRegUsed()
479 MIB.addDef(Mips::SP, RegState::Implicit); in lowerCall()
540 MIB.addDef(Mips::GP, RegState::Implicit); in lowerCall()
H A DMipsSEISelDAGToDAG.cpp134 .addDef(Mips::AT_64) in emitMCountABI()
142 .addDef(Mips::AT) in emitMCountABI()
147 .addDef(Mips::SP) in emitMCountABI()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SpeculationHardening.cpp232 .addDef(MisspeculatingTaintReg) in insertTrackingCode()
372 .addDef(AArch64::XZR) in insertSPToRegTaintPropagation()
378 .addDef(MisspeculatingTaintReg) in insertSPToRegTaintPropagation()
395 .addDef(TmpReg) in insertRegToSPTaintPropagation()
401 .addDef(TmpReg, RegState::Renamable) in insertRegToSPTaintPropagation()
407 .addDef(AArch64::SP) in insertRegToSPTaintPropagation()
455 .addDef(Reg) in makeGPRSpeculationSafe()
579 .addDef(DstReg) in expandSpeculationSafeValue()
H A DAArch64LowerHomogeneousPrologEpilog.cpp232 MIB.addDef(AArch64::SP); in emitStore()
273 MIB.addDef(AArch64::SP); in emitLoad()
352 .addDef(AArch64::FP) in getOrCreateFrameHelper()
367 .addDef(AArch64::X16) in getOrCreateFrameHelper()
614 .addDef(AArch64::FP) in lowerProlog()
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEInstrInfo.cpp795 BuildMI(*MBB, MI, DL, MCID).addDef(VMXu).addUse(VMYu).addUse(VMZu); in expandPseudoLogM()
796 BuildMI(*MBB, MI, DL, MCID).addDef(VMXl).addUse(VMYl).addUse(VMZl); in expandPseudoLogM()
800 BuildMI(*MBB, MI, DL, MCID).addDef(VMXu).addUse(VMYu); in expandPseudoLogM()
801 BuildMI(*MBB, MI, DL, MCID).addDef(VMXl).addUse(VMYl); in expandPseudoLogM()
930 .addDef(VMX) in expandPostRAPseudo()
936 .addDef(VMX) in expandPostRAPseudo()
944 .addDef(VMX) in expandPostRAPseudo()
953 .addDef(VMX) in expandPostRAPseudo()
1104 .addDef(MI.getOperand(0).getReg()) in expandGetStackTopPseudo()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstructionSelector.cpp495 .addDef(DestReg) in putConstant()
599 .addDef(ResReg) in insertComparison()
696 .addDef(ResultReg) in selectGlobal()
793 .addDef(ResReg) in selectSelect()
887 .addDef(SExtResult) in select()
936 .addDef(DstReg) in select()
937 .addDef(IgnoredBits) in select()
H A DARMLowOverheadLoops.cpp1479 MIB.addDef(ARM::LR); in RevertLoopEndDec()
1565 MIB.addDef(ARM::LR); in ExpandLoopStart()
1725 MIB.addDef(ARM::LR); in Expand()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DMachineIRBuilder.cpp322 .addDef(getMRI()->createGenericVirtualRegister(EltTy)) in buildConstant()
358 .addDef(getMRI()->createGenericVirtualRegister(EltTy)) in buildFConstant()
800 MIB.addDef(ResultReg); in buildIntrinsic()
899 .addDef(OldValRes) in buildAtomicCmpXchgWithSuccess()
900 .addDef(SuccessRes) in buildAtomicCmpXchgWithSuccess()
925 .addDef(OldValRes) in buildAtomicCmpXchg()
1078 return buildInstr(TargetOpcode::G_BLOCK_ADDR).addDef(Res).addBlockAddress(BA); in buildBlockAddress()
H A DRegBankSelect.cpp163 .addDef(Dst) in repairReg()
195 .addDef(MO.getReg()); in repairReg()
205 UnMergeBuilder.addDef(DefReg); in repairReg()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86CallLowering.cpp245 MIB.addDef(PhysReg, RegState::Implicit); in markPhysRegUsed()
366 .addDef(X86::AL) in lowerCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructionSelector.cpp356 .addDef(UnusedCarry, RegState::Dead) in selectG_ADD_SUB()
391 .addDef(CarryReg) in selectG_ADD_SUB()
1008 .addDef(Dst1) in selectDivScale()
2002 MIB.addDef(TmpReg); in selectImageIntrinsic()
2109 .addDef(Dst1) in selectDSBvhStackIntrinsic()
5053 .addDef(RSrc2) in buildRSRC()
5056 .addDef(RSrc3) in buildRSRC()
5063 .addDef(RSrcHi) in buildRSRC()
5073 .addDef(RSrcLo) in buildRSRC()
5078 .addDef(RSrc) in buildRSRC()
[all …]
H A DAMDGPURegisterBankInfo.cpp676 .addDef(LoLHS) in split64BitValueForMapping()
677 .addDef(HiLHS) in split64BitValueForMapping()
808 .addDef(InitSaveExecReg); in executeInWaterfallLoop()
840 .addDef(PhiExec) in executeInWaterfallLoop()
945 .addDef(NewExec) in executeInWaterfallLoop()
954 .addDef(ExecReg) in executeInWaterfallLoop()
971 .addDef(ExecReg) in executeInWaterfallLoop()
1849 .addDef(DstReg) in buildVCopy()
1859 .addDef(TmpReg0) in buildVCopy()
1862 .addDef(TmpReg1) in buildVCopy()
[all …]
H A DSIShrinkInstructions.cpp722 .addDef(X1.Reg, 0, X1.SubReg) in matchSwap()
723 .addDef(Y1.Reg, 0, Y1.SubReg) in matchSwap()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonFrameLowering.cpp801 .addDef(Hexagon::D15) in insertEpilogueInBlock()
851 .addDef(Hexagon::D15) in insertEpilogueInBlock()
857 .addDef(Hexagon::D15) in insertEpilogueInBlock()
878 .addDef(Hexagon::D15) in insertEpilogueInBlock()
909 .addDef(SP) in insertAllocframe()
921 .addDef(SP) in insertAllocframe()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/GISel/
H A DM68kCallLowering.cpp185 MIB.addDef(PhysReg, RegState::Implicit); in assignValueToReg()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DMachineIRBuilder.h85 MIB.addDef(Reg); in addDefToMIB()
88 MIB.addDef(MRI.createGenericVirtualRegister(LLTTy)); in addDefToMIB()
91 MIB.addDef(MRI.createVirtualRegister(RC)); in addDefToMIB()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DLiveDebugVariables.cpp414 void addDef(SlotIndex Idx, ArrayRef<MachineOperand> LocMOs, bool IsIndirect, in addDef() function in __anon58a1900c0411::UserValue
860 UV->addDef(Idx, in handleDebugValue()
871 UV->addDef(Idx, UndefMOs, false, IsList, *Expr); in handleDebugValue()

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