/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsLegalizerInfo.cpp | 416 MIRBuilder.buildMergeLikeInstr(Val, {Load_P2Half, Load_Rem}); in legalizeCustom() 419 MIRBuilder.buildMergeLikeInstr(s64, {Load_P2Half, Load_Rem}); in legalizeCustom() 447 MIRBuilder.buildMergeLikeInstr(s64, {Src, C_HiMask.getReg(0)}); in legalizeCustom()
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H A D | MipsCallLowering.cpp | 184 MIRBuilder.buildMergeLikeInstr(Arg.OrigRegs[0], {CopyLo, CopyHi}); in assignCustomValue()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | LegalizerHelper.cpp | 170 MIRBuilder.buildMergeLikeInstr(DstReg, PartRegs); in insertParts() 220 MIRBuilder.buildMergeLikeInstr(DstReg, AllElts); in mergeMixedSubvectors() 356 MIRBuilder.buildMergeLikeInstr(DstReg, RemergeRegs); in buildWidenedRemergeToDst() 1644 MIRBuilder.buildMergeLikeInstr(DstReg, DstRegs); in narrowScalar() 3057 MIRBuilder.buildMergeLikeInstr(Dst, SrcRegs); in lowerBitcast() 3065 MIRBuilder.buildMergeLikeInstr(Dst, SrcRegs); in lowerBitcast() 5641 MIRBuilder.buildMergeLikeInstr(DstReg, DstRegs); in narrowScalarMul() 5732 MIRBuilder.buildMergeLikeInstr(DstReg, DstRegs); in narrowScalarExtract() 5817 MIRBuilder.buildMergeLikeInstr(DstReg, DstRegs); in narrowScalarInsert() 6418 auto Merge = MIRBuilder.buildMergeLikeInstr( in lowerTRUNC() [all …]
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H A D | CallLowering.cpp | 317 DstRegs[0], B.buildMergeLikeInstr(LCMTy, SrcRegs)); in mergeVectorRegsToResultRegs() 400 auto Widened = B.buildMergeLikeInstr(LLT::scalar(SrcSize), Regs); in buildCopyFromRegs() 470 B.buildMergeLikeInstr(RealDstEltTy, Regs.take_front(PartsPerElt)); in buildCopyFromRegs() 595 UnmergeSrc = B.buildMergeLikeInstr(LCMTy, MergeParts).getReg(0); in buildCopyToRegs()
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H A D | MachineIRBuilder.cpp | 263 return buildMergeLikeInstr(Res, Regs); in buildPadVectorWithUndefElements() 282 return buildMergeLikeInstr(Res, Regs); in buildDeleteTrailingVectorElements() 634 MachineIRBuilder::buildMergeLikeInstr(const DstOp &Res, in buildMergeLikeInstr() function in MachineIRBuilder 645 MachineIRBuilder::buildMergeLikeInstr(const DstOp &Res, in buildMergeLikeInstr() function in MachineIRBuilder
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H A D | Utils.cpp | 542 MIRBuilder.buildMergeLikeInstr(MainTy, MergeValues).getReg(0)); in extractParts() 612 VRegs.push_back(MIRBuilder.buildMergeLikeInstr(NarrowTy, Pieces).getReg(0)); in extractVectorParts() 622 MIRBuilder.buildMergeLikeInstr(LeftoverTy, Pieces).getReg(0)); in extractVectorParts()
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H A D | CombinerHelper.cpp | 394 Builder.buildMergeLikeInstr(NewDstReg, Ops); in applyCombineShuffleVector() 2218 Builder.buildMergeLikeInstr(DstReg, {Narrowed, Zero}); in applyCombineShiftToUnmerge() 2231 Builder.buildMergeLikeInstr(DstReg, {Zero, Narrowed}); in applyCombineShiftToUnmerge() 2241 Builder.buildMergeLikeInstr(DstReg, {Unmerge.getReg(1), Hi}); in applyCombineShiftToUnmerge() 2247 Builder.buildMergeLikeInstr(DstReg, {Hi, Hi}); in applyCombineShiftToUnmerge() 2255 Builder.buildMergeLikeInstr(DstReg, {Lo, Hi}); in applyCombineShiftToUnmerge()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPULegalizerInfo.cpp | 2310 B.buildMergeLikeInstr(Dst, {PtrLo, HighAddr}); in legalizeAddrSpaceCast() 2580 B.buildMergeLikeInstr(Dst, {Lo, Hi}); in legalizeFPTOI() 2708 B.buildMergeLikeInstr(Dst, SrcRegs); in legalizeInsertVectorElt() 4067 B.buildMergeLikeInstr(DstReg, AccumRegs); in legalizeMul() 5819 B.buildMergeLikeInstr(Dst, LoadElts); in legalizeBufferLoad() 5839 B.buildMergeLikeInstr(Dst, Repack); in legalizeBufferLoad() 6761 auto Merged = B.buildMergeLikeInstr( in legalizeBVHIntrinsic() 6773 auto MergedDir = B.buildMergeLikeInstr( in legalizeBVHIntrinsic() 6816 B.buildMergeLikeInstr(R1, in legalizeBVHIntrinsic() 6818 B.buildMergeLikeInstr( in legalizeBVHIntrinsic() [all …]
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H A D | AMDGPURegisterBankInfo.cpp | 752 Register Dst = B.buildMergeLikeInstr(Ty, DstParts).getReg(0); in buildReadFirstLane() 1438 B.buildMergeLikeInstr(Dst, LoadParts); in applyMappingSBufferLoad() 1498 B.buildMergeLikeInstr(DstReg, {Extract, Extend}); in applyMappingBFE() 1507 B.buildMergeLikeInstr(DstReg, {UnmergeSOffset.getReg(0), Extract}); in applyMappingBFE() 1691 B.buildMergeLikeInstr(Dst0, {DstLo, DstHi}); in applyMappingMAD_64_32() 1778 return B.buildMergeLikeInstr(LLT::fixed_vector(NumElts, S32), WideRegs) in handleD16VData()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64PreLegalizerCombiner.cpp | 361 .buildMergeLikeInstr(LLT::fixed_vector(16, 8), in applyExtAddvToUdotAddv() 366 .buildMergeLikeInstr(LLT::fixed_vector(16, 8), in applyExtAddvToUdotAddv()
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H A D | AArch64LegalizerInfo.cpp | 1629 MIRBuilder.buildMergeLikeInstr( in legalizeLoadStore() 1936 MIRBuilder.buildMergeLikeInstr(MI.getOperand(0), {DstLo, DstHi}); in legalizeAtomicCmpxchg128()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
H A D | X86CallLowering.cpp | 403 MIRBuilder.buildMergeLikeInstr(Info.OrigRet.Regs[0], NewRegs); in lowerCall()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMCallLowering.cpp | 342 MIRBuilder.buildMergeLikeInstr(Arg.Regs[0], NewRegs); in assignCustomValue()
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | LegalizationArtifactCombiner.h | 1028 MIB.buildMergeLikeInstr(Dst, ConcatSources); in tryCombineMergeLike() 1190 Builder.buildMergeLikeInstr(DefReg, Regs); in tryCombineUnmergeValues()
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H A D | MachineIRBuilder.h | 1026 MachineInstrBuilder buildMergeLikeInstr(const DstOp &Res, 1028 MachineInstrBuilder buildMergeLikeInstr(const DstOp &Res,
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
H A D | RISCVCallLowering.cpp | 267 MIRBuilder.buildMergeLikeInstr(Arg.Regs[0], NewRegs); in assignCustomValue()
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