| /freebsd/contrib/llvm-project/llvm/include/llvm/ADT/ |
| H A D | BitVector.h | 220 Copy &= maskTrailingOnes<BitWord>(LastBit + 1);
244 Copy &= maskTrailingOnes<BitWord>(LastBit + 1); in find_last_in()
286 Copy |= maskTrailingOnes<BitWord>(FirstBit); in find_last_unset_in()
617 const BitWord Mask = maskTrailingOnes<BitWord>(BitDistance);
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| H A D | SmallBitVector.h | 315 Bits &= maskTrailingOnes<uintptr_t>(PriorTo + 1); in find_prev()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Support/ |
| H A D | MathExtras.h | 65 template <typename T> T maskTrailingOnes(unsigned N) { in maskTrailingOnes() function
75 return ~maskTrailingOnes<T>(CHAR_BIT * sizeof(T) - N); in maskLeadingOnes()
87 return maskTrailingOnes<T>(CHAR_BIT * sizeof(T) - N); in maskLeadingZeros()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.h | 74 if (C && C->getZExtValue() == maskTrailingOnes<uint64_t>(Bits)) { in SelectAddrRegZextRegScale()
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| H A D | RISCVISelDAGToDAG.cpp | 651 uint64_t RemovedBitsMask = maskTrailingOnes<uint64_t>(ShAmt); in tryShrinkShlLogicImm()
1038 Mask |= maskTrailingOnes<uint64_t>(ShAmt); in Select()
1160 C1 &= maskTrailingOnes<uint64_t>(XLen - C2); in Select()
1237 C1 == (maskTrailingOnes<uint64_t>(XLen - (C2 + Leading)) << C2)) { in Select()
2713 if (C && C->getZExtValue() == maskTrailingOnes<uint64_t>(Bits)) { in selectZExtBits()
2746 Mask &= maskTrailingOnes<uint64_t>(XLen - C2); in selectSHXADDOp()
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| H A D | RISCVISelLowering.cpp | 3218 maskTrailingOnes<uint64_t>(Op.getScalarValueSizeInBits()); in isSimpleVIDSequence()
3281 maskTrailingOnes<uint64_t>(Op.getScalarValueSizeInBits()); in isSimpleVIDSequence()
3629 uint64_t EltMask = maskTrailingOnes<uint64_t>(EltBitSize); in lowerBuildVectorOfConstants()
3685 uint64_t EltMask = maskTrailingOnes<uint64_t>(EltBitSize); in lowerBuildVectorOfConstants()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIModeRegister.cpp | 288 unsigned Mask = maskTrailingOnes<unsigned>(Width) << Offset; in processBlockPhase1()
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| H A D | SILoadStoreOptimizer.cpp | 1046 const uint32_t Mask = maskTrailingOnes<uint32_t>(8) * 64; in offsetsCanBeCombined()
1055 BaseOff |= Min & maskTrailingOnes<uint32_t>(6); in offsetsCanBeCombined()
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| H A D | AMDGPUInstructionSelector.cpp | 950 maskTrailingOnes<uint64_t>(STI.getWavefrontSizeLog2())); in selectWritelane()
2374 Mask = maskTrailingOnes<unsigned>(Size); in shouldUseAndMask()
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| H A D | AMDGPURegisterBankInfo.cpp | 1530 auto OffsetMask = B.buildConstant(S32, maskTrailingOnes<unsigned>(6)); in applyMappingBFE()
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| H A D | SIISelLowering.cpp | 5201 const unsigned WidthMask = maskTrailingOnes<unsigned>(Width); in EmitInstrWithCustomInserter()
6824 const auto EltMask = maskTrailingOnes<uint64_t>(EltSize); in lowerINSERT_VECTOR_ELT()
15183 Val = Val & maskTrailingOnes<uint64_t>(Size); in clearUnusedBits()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/Disassembler/ |
| H A D | ARCDisassembler.cpp | 213 SignExtend32<B>(maskTrailingOnes<decltype(InsnS)>(B) & InsnS))); in DecodeSignedOperand()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVMatInt.cpp | 182 ShiftedVal |= maskTrailingOnes<uint64_t>(LeadingZeros); in generateInstSeqLeadingZeros()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | RDFRegisters.cpp | 151 C &= maskTrailingOnes<unsigned>(NumRegs % 32); in getUnits()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Object/ |
| H A D | COFF.h | 795 return maskTrailingOnes<uint32_t>(31) & NameOffset; in getNameOffset()
807 return maskTrailingOnes<uint32_t>(31) & SubdirOffset; in value()
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| /freebsd/contrib/llvm-project/lld/MachO/Arch/ |
| H A D | ARM64.cpp | 303 uint32_t imm19 = (ldr.offset / 4 & maskTrailingOnes<uint32_t>(19)) << 5; in writeLiteralLdr()
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| /freebsd/contrib/llvm-project/lldb/source/Utility/ |
| H A D | DataExtractor.cpp | 615 uint64_t bitfield_mask = llvm::maskTrailingOnes<uint64_t>(bitfield_bit_size); in GetMaxS64Bitfield()
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| /freebsd/contrib/llvm-project/llvm/lib/Support/ |
| H A D | APInt.cpp | 427 uint64_t maskBits = maskTrailingOnes<uint64_t>(numBits); in insertBits()
495 uint64_t maskBits = maskTrailingOnes<uint64_t>(numBits); in extractBitsAsZExtValue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVInstructionSelector.cpp | 258 Mask &= maskTrailingOnes<uint64_t>(XLen - C2.getLimitedValue()); in selectSHXADDOp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstCombineIntrinsic.cpp | 2026 Result &= maskTrailingOnes<uint64_t>(Length); in instCombineIntrinsic()
2050 Result &= maskTrailingOnes<uint64_t>(Index); in instCombineIntrinsic()
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| H A D | X86ISelDAGToDAG.cpp | 5894 Mask &= maskTrailingOnes<uint64_t>(CmpVT.getScalarSizeInBits()); in Select()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64InstPrinter.cpp | 311 uint64_t Mask = maskTrailingOnes<uint64_t>(RegWidth); in printInst()
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | AsmMatcherEmitter.cpp | 1468 OperandMask |= maskTrailingOnes<unsigned>(NumOptionalOps + 1) in buildOperandMatchInfo()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 4486 UMask |= maskTrailingOnes<uint64_t>(ShrAmt); in matchBitfieldExtractFromShrAnd()
4487 UMask &= maskTrailingOnes<uint64_t>(Size); in matchBitfieldExtractFromShrAnd()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 2316 AndImm |= maskTrailingOnes<uint64_t>(NumberOfIgnoredLowBits); in isBitfieldExtractOpFromAnd()
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