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Searched refs:BIT10 (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/staging/rtl8723bs/hal/
H A Drtl8723b_rf6052.c65 pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT10 | BIT11); in PHY_RF6052SetBandwidth8723B()
71 pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT10); in PHY_RF6052SetBandwidth8723B()
H A DHal8723BReg.h393 #define IMR_C2HCMD_8723B BIT10 /* CPU to Host Command INT Status, Write 1 clear */
422 #define IMR_RXERR_8723B BIT10 /* Rx Error Flag INT Status, Write 1 clear */
H A Dodm.h375 ODM_BB_PATH_DIV = BIT10,
H A Dodm_DIG.c22 …PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_NHM_TH9_TH10_11N, BIT10|BIT9|BIT8, 0x7); /* 0x890[9:8]=3 … in odm_NHMCounterStatisticsInit()
/linux/drivers/staging/rtl8723bs/include/
H A Drtl8723b_spec.h204 #define IMR_C2HCMD_8723B BIT10 /* CPU to Host Command INT Status, Write 1 clear */
233 #define IMR_RXERR_8723B BIT10 /* Rx Error Flag INT Status, Write 1 clear */
H A Dosdep_service.h27 #define BIT10 0x00000400 macro
H A Dhal_com_reg.h557 #define RRSR_48M BIT10
705 #define IMR_ATIMEND BIT10 /* For 92C, ATIM Window End Interrupt. For 8723 and later ICs, it al…
721 #define IMR_RXERR BIT10
752 #define RCR_RSVD_BIT10 BIT10 /* Reserved */
H A Drtw_mlme_ext.h54 #define DYNAMIC_BB_PATH_DIV BIT10/* ODM_BB_PATH_DIV */
/linux/drivers/net/wireless/realtek/rtlwifi/btcoexist/
H A Dhalbt_precomp.h41 #define BIT10 0x00000400 macro
/linux/include/uapi/linux/
H A Dsynclink.h29 #define BIT10 0x0400 macro
/linux/drivers/scsi/
H A Ddc395x.h66 #define BIT10 0x00000400 macro
/linux/drivers/tty/
H A Dsynclink_gt.c384 #define IRQ_RXDATA BIT10
2042 if (count == info->rbuf_fill_level || (reg & BIT10)) { in isr_rxdata()
4183 case HDLC_ENCODING_NRZB: val |= BIT10; break; in sync_mode()
4185 case HDLC_ENCODING_NRZI: val |= BIT11 + BIT10; break; in sync_mode()
4187 case HDLC_ENCODING_BIPHASE_SPACE: val |= BIT12 + BIT10; break; in sync_mode()
4189 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: val |= BIT12 + BIT11 + BIT10; break; in sync_mode()
4256 case HDLC_ENCODING_NRZB: val |= BIT10; break; in sync_mode()
4258 case HDLC_ENCODING_NRZI: val |= BIT11 + BIT10; break; in sync_mode()
4260 case HDLC_ENCODING_BIPHASE_SPACE: val |= BIT12 + BIT10; break; in sync_mode()
4262 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: val |= BIT12 + BIT11 + BIT10; break; in sync_mode()
/linux/drivers/scsi/lpfc/
H A Dlpfc_hw4.h777 #define LPFC_SLI4_INTR10 BIT10