Searched refs:UVD_MPC_SET_MUXB0__VARB_2__SHIFT (Results 1 – 21 of 21) sorted by relevance
618 #define UVD_MPC_SET_MUXB0__VARB_2__SHIFT … macro
498 #define UVD_MPC_SET_MUXB0__VARB_2__SHIFT 0xc macro
502 #define UVD_MPC_SET_MUXB0__VARB_2__SHIFT 0xc macro
515 #define UVD_MPC_SET_MUXB0__VARB_2__SHIFT 0x0000000c macro
534 #define UVD_MPC_SET_MUXB0__VARB_2__SHIFT 0xc macro
536 #define UVD_MPC_SET_MUXB0__VARB_2__SHIFT 0xc macro
1125 #define UVD_MPC_SET_MUXB0__VARB_2__SHIFT … macro
2866 #define UVD_MPC_SET_MUXB0__VARB_2__SHIFT … macro
2631 #define UVD_MPC_SET_MUXB0__VARB_2__SHIFT … macro
2858 #define UVD_MPC_SET_MUXB0__VARB_2__SHIFT … macro
3939 #define UVD_MPC_SET_MUXB0__VARB_2__SHIFT … macro
4056 #define UVD_MPC_SET_MUXB0__VARB_2__SHIFT … macro
4189 #define UVD_MPC_SET_MUXB0__VARB_2__SHIFT … macro
4232 #define UVD_MPC_SET_MUXB0__VARB_2__SHIFT … macro
931 (0x2 << UVD_MPC_SET_MUXB0__VARB_2__SHIFT) | in vcn_v4_0_5_start_dpg_mode()1070 (0x2 << UVD_MPC_SET_MUXB0__VARB_2__SHIFT) | in vcn_v4_0_5_start()
830 (0x2 << UVD_MPC_SET_MUXB0__VARB_2__SHIFT) | in vcn_v4_0_3_start_dpg_mode()1156 (0x2 << UVD_MPC_SET_MUXB0__VARB_2__SHIFT) | in vcn_v4_0_3_start()
879 (0x2 << UVD_MPC_SET_MUXB0__VARB_2__SHIFT) | in vcn_v1_0_start_spg_mode()1062 (0x2 << UVD_MPC_SET_MUXB0__VARB_2__SHIFT) | in vcn_v1_0_start_dpg_mode()
896 (0x2 << UVD_MPC_SET_MUXB0__VARB_2__SHIFT) | in vcn_v2_0_start_dpg_mode()1029 (0x2 << UVD_MPC_SET_MUXB0__VARB_2__SHIFT) | in vcn_v2_0_start()
1016 (0x2 << UVD_MPC_SET_MUXB0__VARB_2__SHIFT) | in vcn_v4_0_start_dpg_mode()1158 (0x2 << UVD_MPC_SET_MUXB0__VARB_2__SHIFT) | in vcn_v4_0_start()
925 (0x2 << UVD_MPC_SET_MUXB0__VARB_2__SHIFT) | in vcn_v2_5_start_dpg_mode()1079 (0x2 << UVD_MPC_SET_MUXB0__VARB_2__SHIFT) | in vcn_v2_5_start()
1045 (0x2 << UVD_MPC_SET_MUXB0__VARB_2__SHIFT) | in vcn_v3_0_start_dpg_mode()1209 (0x2 << UVD_MPC_SET_MUXB0__VARB_2__SHIFT) | in vcn_v3_0_start()