/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn20/ |
H A D | dcn20_dsc.c | 179 if (dsc_cfg->pic_width > dsc20->max_image_width) in dsc2_validate_stream() 308 DC_LOG_DSC("\tpic_width %d", pps->pic_width); in dsc_log_pps() 384 ASSERT(dsc_cfg->pic_width); in dsc_prepare_config() 395 !dsc_cfg->pic_width || !dsc_cfg->pic_height || in dsc_prepare_config() 413 dsc_reg_vals->pps.pic_width = dsc_cfg->pic_width; in dsc_prepare_config() 423 dsc_reg_vals->pps.slice_width = dsc_cfg->pic_width / dsc_cfg->dc_dsc_cfg.num_slices_h; in dsc_prepare_config() 548 reg_vals->pps.pic_width = 0; in dsc_init_reg_values() 606 PIC_WIDTH, reg_vals->pps.pic_width, in dsc_write_to_registers() 655 PIC_WIDTH, reg_vals->pps.pic_width, in dsc_write_to_registers()
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/linux/drivers/media/platform/chips-media/wave5/ |
H A D | wave5-hw.c | 596 info->pic_width = ((reg_val >> 16) & 0xffff); in wave5_get_dec_seq_result() 720 frame_width = init_info->pic_width; in wave5_vpu_dec_register_framebuffer() 1572 | p_open_param->pic_width); in wave5_vpu_enc_init_seq() 1776 buf_width = ALIGN(p_open_param->pic_width, 16); in wave5_vpu_enc_register_framebuffer() 1782 buf_width = ALIGN(p_open_param->pic_width, 16); in wave5_vpu_enc_register_framebuffer() 1791 buf_width = ALIGN(p_open_param->pic_width, 8); in wave5_vpu_enc_register_framebuffer() 1797 buf_width = ALIGN(p_open_param->pic_width, 32); in wave5_vpu_enc_register_framebuffer() 2354 u32 pic_width; in wave5_vpu_enc_check_open_param() local 2364 pic_width = open_param->pic_width; in wave5_vpu_enc_check_open_param() 2402 if (pic_width < W5_MIN_ENC_PIC_WIDTH || pic_width > W5_MAX_ENC_PIC_WIDTH || in wave5_vpu_enc_check_open_param() [all …]
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H A D | wave5-vpuapi.h | 367 u32 pic_width; member 574 u32 pic_width; /* width of a picture to be encoded in unit of sample */ member
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H A D | wave5-vpu-dec.c | 376 __func__, initial_info->pic_width, initial_info->pic_height, in handle_dynamic_resolution_change() 393 inst->conf_win.width = initial_info->pic_width - in handle_dynamic_resolution_change() 398 wave5_update_pix_fmt(&inst->src_fmt, initial_info->pic_width, in handle_dynamic_resolution_change() 400 wave5_update_pix_fmt(&inst->dst_fmt, initial_info->pic_width, in handle_dynamic_resolution_change()
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H A D | wave5-vpuapi.c | 300 if (stride < p_dec_info->initial_info.pic_width || (stride % 8 != 0) || in wave5_vpu_dec_register_frame_buffer_ex()
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H A D | wave5-vpu-enc.c | 1150 open_param->pic_width = inst->dst_fmt.width; in wave5_set_enc_openparam()
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/linux/include/drm/display/ |
H A D | drm_dsc.h | 107 u16 pic_width; member 345 __be16 pic_width; member
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/linux/drivers/gpu/drm/amd/display/dc/dsc/ |
H A D | dc_dsc.c | 874 int pic_width; in setup_dsc_config() local 887 pic_width = timing->h_addressable + timing->h_border_left + timing->h_border_right; in setup_dsc_config() 893 if (dsc_sink_caps->branch_max_line_width && dsc_sink_caps->branch_max_line_width < pic_width) in setup_dsc_config() 966 if (pic_width % max_slices_h == 0) in setup_dsc_config() 976 min_slices_h = pic_width / dsc_common_caps.max_slice_width; in setup_dsc_config() 977 if (pic_width % dsc_common_caps.max_slice_width) in setup_dsc_config() 992 if (pic_width % min_slices_h != 0) in setup_dsc_config() 1034 slice_width = pic_width / num_slices_h; in setup_dsc_config()
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H A D | rc_calc_dpi.c | 39 to->pic_width = from->pic_width; in copy_pps_fields()
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H A D | dsc.h | 38 uint32_t pic_width; member
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/linux/drivers/gpu/drm/i915/display/ |
H A D | intel_vdsc.c | 271 vdsc_cfg->pic_width = pipe_config->hw.adjusted_mode.crtc_hdisplay; in intel_dsc_compute_params() 272 vdsc_cfg->slice_width = DIV_ROUND_UP(vdsc_cfg->pic_width, in intel_dsc_compute_params() 470 DSC_PPS2_PIC_WIDTH(vdsc_cfg->pic_width / num_vdsc_instances); in intel_dsc_pps_configure() 528 DSC_PPS16_SLICE_PER_LINE((vdsc_cfg->pic_width / num_vdsc_instances) / in intel_dsc_pps_configure() 890 vdsc_cfg->pic_width = REG_FIELD_GET(DSC_PPS2_PIC_WIDTH_MASK, pps_temp) * num_vdsc_instances; in intel_dsc_get_pps_config()
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H A D | intel_vdsc_regs.h | 99 #define DSC_PPS2_PIC_WIDTH(pic_width) REG_FIELD_PREP(DSC_PPS2_PIC_WIDTH_MASK, pic_width) argument
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H A D | icl_dsi.c | 1600 vdsc_cfg->pic_width % vdsc_cfg->slice_width); in gen11_dsi_dsc_compute_config()
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H A D | intel_display.c | 5378 PIPE_CONF_CHECK_I(dsc.config.pic_width); in intel_pipe_config_compare()
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/linux/drivers/gpu/drm/display/ |
H A D | drm_dsc_helper.c | 144 pps_payload->pic_width = cpu_to_be16(dsc_cfg->pic_width); in drm_dsc_pps_payload_pack()
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/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn314/ |
H A D | dcn314_hwseq.c | 89 …dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.… in update_dsc_on_stream() 108 dsc_cfg.pic_width *= opp_cnt; in update_dsc_on_stream()
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/linux/drivers/gpu/drm/msm/disp/dpu1/ |
H A D | dpu_hw_dsc.c | 75 data = dsc->pic_width << 16; in dpu_hw_dsc_config()
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H A D | dpu_hw_dsc_1_2.c | 157 data = (dsc->pic_width & 0xffff) | in dpu_hw_dsc_config_1_2()
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H A D | dpu_encoder.c | 1910 int pic_width; in dpu_encoder_prep_dsc() local 1925 pic_width = dsc->pic_width; in dpu_encoder_prep_dsc() 1933 this_frame_slices = pic_width / dsc->slice_width; in dpu_encoder_prep_dsc()
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/linux/drivers/gpu/drm/msm/dsi/ |
H A D | dsi_host.c | 952 dsc->pic_width = mode->hdisplay; in dsi_timing_setup() 954 DBG("Mode %dx%d\n", dsc->pic_width, dsc->pic_height); in dsi_timing_setup() 2503 int pic_width = mode->hdisplay; in msm_dsi_host_check_dsc() local 2509 if (pic_width % dsc->slice_width) { in msm_dsi_host_check_dsc() 2511 pic_width, dsc->slice_width); in msm_dsi_host_check_dsc()
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/linux/drivers/gpu/drm/amd/display/dc/link/ |
H A D | link_dpms.c | 811 …dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.… in link_set_dsc_on_stream() 833 dsc_cfg.pic_width *= opp_cnt; in link_set_dsc_on_stream() 921 …dsc_cfg.pic_width = stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.h… in link_set_dsc_pps_packet()
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/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
H A D | dcn35_hwseq.c | 380 …dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.… in update_dsc_on_stream() 399 dsc_cfg.pic_width *= opp_cnt; in update_dsc_on_stream()
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/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
H A D | dcn32_hwseq.c | 996 …dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.… in update_dsc_on_stream() 1019 dsc_cfg.pic_width *= opp_cnt; in update_dsc_on_stream()
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/linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
H A D | dcn20_resource.c | 1684 dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left in dcn20_validate_dsc()
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