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Searched refs:AR_PCU_MISC_MODE2 (Results 1 – 7 of 7) sorted by relevance

/netbsd/sys/external/isc/atheros_hal/dist/ar5416/
H A Dar9285_attach.c322 val = OS_REG_READ(ah, AR_PCU_MISC_MODE2) & in ar9285WriteIni()
324 OS_REG_WRITE(ah, AR_PCU_MISC_MODE2, val); in ar9285WriteIni()
H A Dar5416reg.h130 #define AR_PCU_MISC_MODE2 0x8344 macro
/netbsd/sys/dev/ic/
H A Darn9287.c630 AR_SETBITS(sc, AR_PCU_MISC_MODE2, AR_PCU_MISC_MODE2_ENABLE_AGGWEP); in ar9287_1_3_setup_async_fifo()
H A Dathnreg.h242 #define AR_PCU_MISC_MODE2 0x8344 macro
H A Dathn.c2284 AR_CLRBITS(sc, AR_PCU_MISC_MODE2, in athn_hw_reset()
2286 AR_SETBITS(sc, AR_PCU_MISC_MODE2, in athn_hw_reset()
H A Darn5008.c2466 reg = AR_READ(sc, AR_PCU_MISC_MODE2); in ar5008_hw_init()
2471 AR_WRITE(sc, AR_PCU_MISC_MODE2, reg); in ar5008_hw_init()
H A Darn9003.c3289 reg = AR_READ(sc, AR_PCU_MISC_MODE2); in ar9003_hw_init()
3293 AR_WRITE(sc, AR_PCU_MISC_MODE2, reg); in ar9003_hw_init()