/netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
H A D | InlineAsmLowering.cpp | 102 &TRI, RefOpInfo.ConstraintCode, RefOpInfo.ConstraintVT); in getRegistersForValue() 201 OpInfo.ConstraintCode = OpInfo.Codes[BestIdx]; in chooseConstraint() 211 OpInfo.ConstraintCode = OpInfo.Codes[0]; in computeConstraintToUse() 212 OpInfo.ConstraintType = TLI->getConstraintType(OpInfo.ConstraintCode); in computeConstraintToUse() 218 if (OpInfo.ConstraintCode == "X" && OpInfo.CallOperandVal) { in computeConstraintToUse() 229 OpInfo.ConstraintCode = Repl; in computeConstraintToUse() 378 TLI->getInlineAsmMemConstraint(OpInfo.ConstraintCode); in lowerInlineAsm() 491 OpInfo.ConstraintCode, Ops, in lowerInlineAsm() 494 << OpInfo.ConstraintCode << " yet\n"); in lowerInlineAsm() 520 TLI->getInlineAsmMemConstraint(OpInfo.ConstraintCode); in lowerInlineAsm() [all …]
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
H A D | LanaiISelDAGToDAG.cpp | 62 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintCode, 252 const SDValue &Op, unsigned ConstraintCode, std::vector<SDValue> &OutOps) { in SelectInlineAsmMemoryOperand() argument 254 switch (ConstraintCode) { in SelectInlineAsmMemoryOperand()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.h | 642 getInlineAsmMemConstraint(StringRef ConstraintCode) const override { in getInlineAsmMemConstraint() argument 643 if (ConstraintCode == "o") in getInlineAsmMemConstraint() 645 if (ConstraintCode == "R") in getInlineAsmMemConstraint() 647 if (ConstraintCode == "ZC") in getInlineAsmMemConstraint() 649 return TargetLowering::getInlineAsmMemConstraint(ConstraintCode); in getInlineAsmMemConstraint()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 532 getInlineAsmMemConstraint(StringRef ConstraintCode) const override { in getInlineAsmMemConstraint() argument 533 if (ConstraintCode == "Q") in getInlineAsmMemConstraint() 535 else if (ConstraintCode.size() == 2) { in getInlineAsmMemConstraint() 536 if (ConstraintCode[0] == 'U') { in getInlineAsmMemConstraint() 537 switch(ConstraintCode[1]) { in getInlineAsmMemConstraint() 557 return TargetLowering::getInlineAsmMemConstraint(ConstraintCode); in getInlineAsmMemConstraint()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.h | 465 unsigned getInlineAsmMemConstraint(StringRef ConstraintCode) const override { in getInlineAsmMemConstraint() argument 466 if (ConstraintCode.size() == 1) { in getInlineAsmMemConstraint() 467 switch(ConstraintCode[0]) { in getInlineAsmMemConstraint() 482 return TargetLowering::getInlineAsmMemConstraint(ConstraintCode); in getInlineAsmMemConstraint()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
H A D | AVRISelDAGToDAG.cpp | 43 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintCode, 203 unsigned ConstraintCode, in SelectInlineAsmMemoryOperand() argument 205 assert((ConstraintCode == InlineAsm::Constraint_m || in SelectInlineAsmMemoryOperand() 206 ConstraintCode == InlineAsm::Constraint_Q) && in SelectInlineAsmMemoryOperand()
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H A D | AVRISelLowering.h | 134 unsigned getInlineAsmMemConstraint(StringRef ConstraintCode) const override;
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H A D | AVRISelLowering.cpp | 1791 AVRTargetLowering::getInlineAsmMemConstraint(StringRef ConstraintCode) const { in getInlineAsmMemConstraint() 1794 switch (ConstraintCode[0]) { in getInlineAsmMemConstraint() 1798 return TargetLowering::getInlineAsmMemConstraint(ConstraintCode); in getInlineAsmMemConstraint()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.h | 933 getInlineAsmMemConstraint(StringRef ConstraintCode) const override { in getInlineAsmMemConstraint() argument 934 if (ConstraintCode == "es") in getInlineAsmMemConstraint() 936 else if (ConstraintCode == "Q") in getInlineAsmMemConstraint() 938 else if (ConstraintCode == "Z") in getInlineAsmMemConstraint() 940 else if (ConstraintCode == "Zy") in getInlineAsmMemConstraint() 942 return TargetLowering::getInlineAsmMemConstraint(ConstraintCode); in getInlineAsmMemConstraint()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
H A D | BPFISelDAGToDAG.cpp | 63 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintCode, 161 const SDValue &Op, unsigned ConstraintCode, std::vector<SDValue> &OutOps) { in SelectInlineAsmMemoryOperand() argument 163 switch (ConstraintCode) { in SelectInlineAsmMemoryOperand()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.h | 1140 getInlineAsmMemConstraint(StringRef ConstraintCode) const override { in getInlineAsmMemConstraint() argument 1141 if (ConstraintCode == "v") in getInlineAsmMemConstraint() 1143 return TargetLowering::getInlineAsmMemConstraint(ConstraintCode); in getInlineAsmMemConstraint()
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H A D | X86ISelLowering.cpp | 51489 X86::CondCode Cond = parseConstraintCode(OpInfo.ConstraintCode); in LowerAsmOutputForConstraint()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.h | 1037 unsigned getInlineAsmMemConstraint(StringRef ConstraintCode) const override { in getInlineAsmMemConstraint() argument 1038 if (ConstraintCode == "Q") in getInlineAsmMemConstraint() 1043 return TargetLowering::getInlineAsmMemConstraint(ConstraintCode); in getInlineAsmMemConstraint()
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/netbsd/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
H A D | TargetLowering.h | 4140 std::string ConstraintCode; member 4211 virtual unsigned getInlineAsmMemConstraint(StringRef ConstraintCode) const { in getInlineAsmMemConstraint() argument 4212 if (ConstraintCode == "m") in getInlineAsmMemConstraint() 4214 if (ConstraintCode == "o") in getInlineAsmMemConstraint() 4216 if (ConstraintCode == "X") in getInlineAsmMemConstraint()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.h | 343 unsigned getInlineAsmMemConstraint(StringRef ConstraintCode) const override;
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H A D | RISCVISelLowering.cpp | 8215 RISCVTargetLowering::getInlineAsmMemConstraint(StringRef ConstraintCode) const { in getInlineAsmMemConstraint() 8217 if (ConstraintCode.size() == 1) { in getInlineAsmMemConstraint() 8218 switch (ConstraintCode[0]) { in getInlineAsmMemConstraint() 8226 return TargetLowering::getInlineAsmMemConstraint(ConstraintCode); in getInlineAsmMemConstraint()
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/netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
H A D | FunctionLoweringInfo.cpp | 208 TLI->getRegForInlineAsmConstraint(TRI, Op.ConstraintCode, in set()
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H A D | TargetLowering.cpp | 4608 assert(!ConstraintCode.empty() && "No known constraint!"); in isMatchingInputConstraint() 4609 return isdigit(static_cast<unsigned char>(ConstraintCode[0])); in isMatchingInputConstraint() 4615 assert(!ConstraintCode.empty() && "No known constraint!"); in getMatchedOperand() 4616 return atoi(ConstraintCode.c_str()); in getMatchedOperand() 4789 getRegForInlineAsmConstraint(TRI, OpInfo.ConstraintCode, in ParseConstraints() 4792 getRegForInlineAsmConstraint(TRI, Input.ConstraintCode, in ParseConstraints() 4969 OpInfo.ConstraintCode = OpInfo.Codes[BestIdx]; in ChooseConstraint() 4982 OpInfo.ConstraintCode = OpInfo.Codes[0]; in ComputeConstraintToUse() 4983 OpInfo.ConstraintType = getConstraintType(OpInfo.ConstraintCode); in ComputeConstraintToUse() 4989 if (OpInfo.ConstraintCode == "X" && OpInfo.CallOperandVal) { in ComputeConstraintToUse() [all …]
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H A D | SelectionDAGBuilder.cpp | 8140 TLI.getRegForInlineAsmConstraint(TRI, OpInfo.ConstraintCode, in patchMatchingInput() 8143 TLI.getRegForInlineAsmConstraint(TRI, MatchingOpInfo.ConstraintCode, in patchMatchingInput() 8224 &TRI, RefOpInfo.ConstraintCode, RefOpInfo.ConstraintVT); in GetRegistersForValue() 8560 TLI.getInlineAsmMemConstraint(OpInfo.ConstraintCode); in visitInlineAsm() 8577 Twine(OpInfo.ConstraintCode) + "'"); in visitInlineAsm() 8663 TLI.LowerAsmOperandForConstraint(InOperandVal, OpInfo.ConstraintCode, in visitInlineAsm() 8669 Twine(OpInfo.ConstraintCode) + "'"); in visitInlineAsm() 8675 Twine(OpInfo.ConstraintCode) + "'"); in visitInlineAsm() 8695 TLI.getInlineAsmMemConstraint(OpInfo.ConstraintCode); in visitInlineAsm() 8718 Twine(OpInfo.ConstraintCode) + "'"); in visitInlineAsm() [all …]
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUTargetTransformInfo.cpp | 938 TRI, TC.ConstraintCode, TC.ConstraintVT); in isInlineAsmSourceOfDivergence()
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H A D | SIISelLowering.cpp | 12264 SIRI, TC.ConstraintCode, TC.ConstraintVT); in requiresUniformRegister()
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