/netbsd/external/gpl3/gdb/dist/opcodes/ |
H A D | xstormy16-opc.c | 179 { { MNEM, OP (WS2), ' ', OP (LMEM8), ',', '#', OP (IMM16), 0 } }, 305 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 401 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 449 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 467 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 485 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 515 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 539 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 563 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 587 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, [all …]
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H A D | m10200-opc.c | 68 #define IMM16 (IMM8+1) macro 73 #define IMM16_PCREL (IMM16+1) 204 { "mov", 0xdc0000, 0xfc0000, FMT_3, {IMM16, AN0}}, 258 { "sub", 0xf71c0000, 0xfffc0000, FMT_6, {IMM16, DN0}}, 260 { "sub", 0xf70c0000, 0xfffc0000, FMT_6, {IMM16, AN0}}, 276 { "cmp", 0xec0000, 0xfc0000, FMT_3, {IMM16, AN0}},
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H A D | m10300-opc.c | 86 #define IMM16 (IMM8+1) macro 91 #define IMM16_PCREL (IMM16+1) 476 { "mov", 0xfab40000, 0xfffc0000, 0, FMT_D2, 0, {MEM2(IMM16, SP), DN0}}, 539 { "mov", 0x240000, 0xfc0000, 0, FMT_S2, 0, {IMM16, AN0}}, 843 { "cmp", 0xfad80000, 0xfffc0000, 0, FMT_D2, 0, {IMM16, AN0}}, 854 { "and", 0xfae00000, 0xfffc0000, 0, FMT_D2, 0, {IMM16, DN0}}, 855 { "and", 0xfafc0000, 0xffff0000, 0, FMT_D2, 0, {IMM16, PSW}}, 866 { "or", 0xfae40000, 0xfffc0000, 0, FMT_D2, 0, {IMM16, DN0}}, 867 { "or", 0xfafd0000, 0xffff0000, 0, FMT_D2, 0, {IMM16, PSW}}, 877 { "xor", 0xfae80000, 0xfffc0000, 0, FMT_D2, 0, {IMM16, DN0}}, [all …]
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H A D | mt-opc.c | 286 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 310 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 328 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 424 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 436 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 448 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 520 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 526 { { MNEM, ' ', OP (FRSR2), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } },
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H A D | pru-dis.c | 157 i = GET_INSN_FIELD (IMM16, opcode) * 4; in pru_print_insn_arg() 168 i = GET_INSN_FIELD (IMM16, opcode); in pru_print_insn_arg()
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/netbsd/external/gpl3/binutils.old/dist/opcodes/ |
H A D | xstormy16-opc.c | 179 { { MNEM, OP (WS2), ' ', OP (LMEM8), ',', '#', OP (IMM16), 0 } }, 305 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 401 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 449 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 467 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 485 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 515 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 539 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 563 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 587 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, [all …]
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H A D | m10200-opc.c | 68 #define IMM16 (IMM8+1) macro 73 #define IMM16_PCREL (IMM16+1) 204 { "mov", 0xdc0000, 0xfc0000, FMT_3, {IMM16, AN0}}, 258 { "sub", 0xf71c0000, 0xfffc0000, FMT_6, {IMM16, DN0}}, 260 { "sub", 0xf70c0000, 0xfffc0000, FMT_6, {IMM16, AN0}}, 276 { "cmp", 0xec0000, 0xfc0000, FMT_3, {IMM16, AN0}},
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H A D | m10300-opc.c | 86 #define IMM16 (IMM8+1) macro 91 #define IMM16_PCREL (IMM16+1) 476 { "mov", 0xfab40000, 0xfffc0000, 0, FMT_D2, 0, {MEM2(IMM16, SP), DN0}}, 539 { "mov", 0x240000, 0xfc0000, 0, FMT_S2, 0, {IMM16, AN0}}, 843 { "cmp", 0xfad80000, 0xfffc0000, 0, FMT_D2, 0, {IMM16, AN0}}, 854 { "and", 0xfae00000, 0xfffc0000, 0, FMT_D2, 0, {IMM16, DN0}}, 855 { "and", 0xfafc0000, 0xffff0000, 0, FMT_D2, 0, {IMM16, PSW}}, 866 { "or", 0xfae40000, 0xfffc0000, 0, FMT_D2, 0, {IMM16, DN0}}, 867 { "or", 0xfafd0000, 0xffff0000, 0, FMT_D2, 0, {IMM16, PSW}}, 877 { "xor", 0xfae80000, 0xfffc0000, 0, FMT_D2, 0, {IMM16, DN0}}, [all …]
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H A D | mt-opc.c | 286 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 310 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 328 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 424 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 436 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 448 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 520 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 526 { { MNEM, ' ', OP (FRSR2), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } },
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H A D | pru-dis.c | 157 i = GET_INSN_FIELD (IMM16, opcode) * 4; in pru_print_insn_arg() 168 i = GET_INSN_FIELD (IMM16, opcode); in pru_print_insn_arg()
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/netbsd/external/gpl3/binutils/dist/opcodes/ |
H A D | xstormy16-opc.c | 179 { { MNEM, OP (WS2), ' ', OP (LMEM8), ',', '#', OP (IMM16), 0 } }, 305 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 401 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 449 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 467 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 485 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 515 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 539 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 563 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 587 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, [all …]
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H A D | m10200-opc.c | 68 #define IMM16 (IMM8+1) macro 73 #define IMM16_PCREL (IMM16+1) 204 { "mov", 0xdc0000, 0xfc0000, FMT_3, {IMM16, AN0}}, 258 { "sub", 0xf71c0000, 0xfffc0000, FMT_6, {IMM16, DN0}}, 260 { "sub", 0xf70c0000, 0xfffc0000, FMT_6, {IMM16, AN0}}, 276 { "cmp", 0xec0000, 0xfc0000, FMT_3, {IMM16, AN0}},
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H A D | m10300-opc.c | 86 #define IMM16 (IMM8+1) macro 91 #define IMM16_PCREL (IMM16+1) 476 { "mov", 0xfab40000, 0xfffc0000, 0, FMT_D2, 0, {MEM2(IMM16, SP), DN0}}, 539 { "mov", 0x240000, 0xfc0000, 0, FMT_S2, 0, {IMM16, AN0}}, 843 { "cmp", 0xfad80000, 0xfffc0000, 0, FMT_D2, 0, {IMM16, AN0}}, 854 { "and", 0xfae00000, 0xfffc0000, 0, FMT_D2, 0, {IMM16, DN0}}, 855 { "and", 0xfafc0000, 0xffff0000, 0, FMT_D2, 0, {IMM16, PSW}}, 866 { "or", 0xfae40000, 0xfffc0000, 0, FMT_D2, 0, {IMM16, DN0}}, 867 { "or", 0xfafd0000, 0xffff0000, 0, FMT_D2, 0, {IMM16, PSW}}, 877 { "xor", 0xfae80000, 0xfffc0000, 0, FMT_D2, 0, {IMM16, DN0}}, [all …]
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H A D | mt-opc.c | 286 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 310 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 328 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 424 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 436 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 448 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 520 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 526 { { MNEM, ' ', OP (FRSR2), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } },
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H A D | pru-dis.c | 157 i = GET_INSN_FIELD (IMM16, opcode) * 4; in pru_print_insn_arg() 168 i = GET_INSN_FIELD (IMM16, opcode); in pru_print_insn_arg()
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/netbsd/external/gpl3/gdb.old/dist/opcodes/ |
H A D | xstormy16-opc.c | 179 { { MNEM, OP (WS2), ' ', OP (LMEM8), ',', '#', OP (IMM16), 0 } }, 305 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 401 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 449 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 467 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 485 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 515 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 539 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 563 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, 587 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }, [all …]
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H A D | m10200-opc.c | 68 #define IMM16 (IMM8+1) macro 73 #define IMM16_PCREL (IMM16+1) 204 { "mov", 0xdc0000, 0xfc0000, FMT_3, {IMM16, AN0}}, 258 { "sub", 0xf71c0000, 0xfffc0000, FMT_6, {IMM16, DN0}}, 260 { "sub", 0xf70c0000, 0xfffc0000, FMT_6, {IMM16, AN0}}, 276 { "cmp", 0xec0000, 0xfc0000, FMT_3, {IMM16, AN0}},
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H A D | m10300-opc.c | 86 #define IMM16 (IMM8+1) macro 91 #define IMM16_PCREL (IMM16+1) 476 { "mov", 0xfab40000, 0xfffc0000, 0, FMT_D2, 0, {MEM2(IMM16, SP), DN0}}, 539 { "mov", 0x240000, 0xfc0000, 0, FMT_S2, 0, {IMM16, AN0}}, 843 { "cmp", 0xfad80000, 0xfffc0000, 0, FMT_D2, 0, {IMM16, AN0}}, 854 { "and", 0xfae00000, 0xfffc0000, 0, FMT_D2, 0, {IMM16, DN0}}, 855 { "and", 0xfafc0000, 0xffff0000, 0, FMT_D2, 0, {IMM16, PSW}}, 866 { "or", 0xfae40000, 0xfffc0000, 0, FMT_D2, 0, {IMM16, DN0}}, 867 { "or", 0xfafd0000, 0xffff0000, 0, FMT_D2, 0, {IMM16, PSW}}, 877 { "xor", 0xfae80000, 0xfffc0000, 0, FMT_D2, 0, {IMM16, DN0}}, [all …]
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H A D | mt-opc.c | 286 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 310 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 328 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 424 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 436 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 448 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 520 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 526 { { MNEM, ' ', OP (FRSR2), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } },
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H A D | pru-dis.c | 157 i = GET_INSN_FIELD (IMM16, opcode) * 4; in pru_print_insn_arg() 168 i = GET_INSN_FIELD (IMM16, opcode); in pru_print_insn_arg()
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/netbsd/external/gpl3/gdb/dist/sim/pru/ |
H A D | pru.h | 66 #define IMM16 GET_INSN_FIELD (IMM16, inst) macro
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H A D | pru.isa | 115 OP2 = (IO ? IMM16 : RS2); 119 OP2 = (IO ? IMM16 : RS2); 124 RD = IMM16;
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/netbsd/external/gpl3/gdb.old/dist/sim/pru/ |
H A D | pru.h | 66 #define IMM16 GET_INSN_FIELD (IMM16, inst) macro
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H A D | pru.isa | 115 OP2 = (IO ? IMM16 : RS2); 119 OP2 = (IO ? IMM16 : RS2); 124 RD = IMM16;
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/netbsd/external/gpl3/gdb/dist/gas/config/ |
H A D | tc-pru.c | 818 SET_INSN_FIELD (IMM16, insn1, fixup >> 16); in md_apply_fix() 819 SET_INSN_FIELD (IMM16, insn2, fixup & 0xffff); in md_apply_fix() 1151 SET_INSN_FIELD (IMM16, insn_info->insn_code, imm32 >> 16); in pru_assemble_arg_i() 1166 SET_INSN_FIELD (IMM16, insn_info->insn_code, imm16); in pru_assemble_arg_j() 1185 SET_INSN_FIELD (IMM16, insn_info->insn_code, imm16); in pru_assemble_arg_W() 1485 SET_INSN_FIELD (IMM16, insn->insn_code, insn->ldi32_imm32 >> 16); in output_insn_ldi32() 1490 SET_INSN_FIELD (IMM16, insn2, insn->ldi32_imm32 & 0xffff); in output_insn_ldi32()
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