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Searched refs:INTERLEAVE_EN (Results 1 – 9 of 9) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Dsi_enums.h40 #define INTERLEAVE_EN (1 << 0) macro
H A Damdgpu_dce_v10_0.c2109 tmp = REG_SET_FIELD(tmp, LB_DATA_FORMAT, INTERLEAVE_EN, 1); in dce_v10_0_set_interleave()
2111 tmp = REG_SET_FIELD(tmp, LB_DATA_FORMAT, INTERLEAVE_EN, 0); in dce_v10_0_set_interleave()
H A Damdgpu_dce_v11_0.c2151 tmp = REG_SET_FIELD(tmp, LB_DATA_FORMAT, INTERLEAVE_EN, 1); in dce_v11_0_set_interleave()
2153 tmp = REG_SET_FIELD(tmp, LB_DATA_FORMAT, INTERLEAVE_EN, 0); in dce_v11_0_set_interleave()
H A Damdgpu_dce_v6_0.c2046 INTERLEAVE_EN); in dce_v6_0_set_interleave()
/netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
H A Damdgpu_dcn10_dpp_dscl.c223 INTERLEAVE_EN, lb_params->interleave_en, /* Interleave source enable */ in dpp1_dscl_set_lb()
229 INTERLEAVE_EN, lb_params->interleave_en, /* Interleave source enable */ in dpp1_dscl_set_lb()
H A Ddcn10_dpp.h205 TF_SF(DSCL0_LB_DATA_FORMAT, INTERLEAVE_EN, mask_sh),\
489 type INTERLEAVE_EN; \
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
H A Ddce_11_0_enum.h3270 INTERLEAVE_EN = 0x1, enumerator
H A Ddce_11_2_enum.h3753 INTERLEAVE_EN = 0x1, enumerator
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/
H A Dvega10_enum.h1738 INTERLEAVE_EN = 0x00000001, enumerator