Searched refs:LB_MEMORY_CTRL (Results 1 – 8 of 8) sorted by relevance
| /netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/ |
| H A D | dce_transform.h | 95 SRI(LB_MEMORY_CTRL, LB, id), \
187 XFM_SF(LB_MEMORY_CTRL, LB_MEMORY_CONFIG, mask_sh), \
188 XFM_SF(LB_MEMORY_CTRL, LB_MEMORY_SIZE, mask_sh), \
445 uint32_t LB_MEMORY_CTRL; member
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| H A D | amdgpu_dce_transform.c | 336 REG_SET_2(LB_MEMORY_CTRL, 0, in dce_transform_set_scaler()
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| /netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| H A D | amdgpu_dcn10_dpp_dscl.c | 233 REG_SET_2(LB_MEMORY_CTRL, 0, in dpp1_dscl_set_lb()
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| H A D | dcn10_dpp.h | 60 SRI(LB_MEMORY_CTRL, DSCL, id), \
1103 uint32_t LB_MEMORY_CTRL; \
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| /netbsd/sys/external/bsd/drm2/dist/drm/radeon/ |
| H A D | cikd.h | 866 #define LB_MEMORY_CTRL 0x6b04 macro
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| H A D | radeon_cik.c | 8917 WREG32(LB_MEMORY_CTRL + radeon_crtc->crtc_offset, in dce8_line_buffer_adjust()
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| /netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| H A D | amdgpu_dce_v10_0.c | 634 tmp = REG_SET_FIELD(tmp, LB_MEMORY_CTRL, LB_MEMORY_CONFIG, mem_cfg); in dce_v10_0_line_buffer_adjust()
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| H A D | amdgpu_dce_v11_0.c | 660 tmp = REG_SET_FIELD(tmp, LB_MEMORY_CTRL, LB_MEMORY_CONFIG, mem_cfg); in dce_v11_0_line_buffer_adjust()
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