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Searched refs:PRIVATE_ADDRESS (Results 1 – 19 of 19) sorted by relevance

/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPUTargetTransformInfo.cpp179 if (AS == AMDGPUAS::PRIVATE_ADDRESS) in getUnrollingPreferences()
189 if (AS == AMDGPUAS::PRIVATE_ADDRESS) { in getUnrollingPreferences()
371 if (AddrSpace == AMDGPUAS::PRIVATE_ADDRESS) in getLoadStoreVecRegBitWidth()
384 if (AddrSpace == AMDGPUAS::PRIVATE_ADDRESS) { in isLegalToVectorizeMemChain()
972 return Load->getPointerAddressSpace() == AMDGPUAS::PRIVATE_ADDRESS || in isSourceOfDivergence()
1091 AMDGPUAS::LOCAL_ADDRESS : AMDGPUAS::PRIVATE_ADDRESS; in rewriteIntrinsicWithAddressSpace()
1209 if (!Ty || (Ty->getAddressSpace() != AMDGPUAS::PRIVATE_ADDRESS && in adjustInliningThreshold()
1277 if (AddrSpace == AMDGPUAS::PRIVATE_ADDRESS) in getLoadStoreVecRegBitWidth()
1294 return (AddrSpace != AMDGPUAS::PRIVATE_ADDRESS); in isLegalToVectorizeMemChain()
H A DAMDGPUAliasAnalysis.cpp92 (asB == AMDGPUAS::LOCAL_ADDRESS || asB == AMDGPUAS::PRIVATE_ADDRESS)) { in alias()
H A DR600ISelLowering.cpp1055 assert(Store->getAddressSpace() == AMDGPUAS::PRIVATE_ADDRESS); in lowerPrivateTruncStore()
1088 MachinePointerInfo PtrInfo(AMDGPUAS::PRIVATE_ADDRESS); in lowerPrivateTruncStore()
1156 if ((AS == AMDGPUAS::LOCAL_ADDRESS || AS == AMDGPUAS::PRIVATE_ADDRESS || in LowerSTORE()
1159 if ((AS == AMDGPUAS::PRIVATE_ADDRESS) && TruncatingStore) { in LowerSTORE()
1237 if (AS != AMDGPUAS::PRIVATE_ADDRESS) in LowerSTORE()
1319 MachinePointerInfo PtrInfo(AMDGPUAS::PRIVATE_ADDRESS); in lowerPrivateExtLoad()
1357 if (AS == AMDGPUAS::PRIVATE_ADDRESS && in LowerLOAD()
1368 LoadNode->getAddressSpace() == AMDGPUAS::PRIVATE_ADDRESS) && in LowerLOAD()
1426 if (LoadNode->getAddressSpace() != AMDGPUAS::PRIVATE_ADDRESS) { in LowerLOAD()
1569 if ((AS == AMDGPUAS::LOCAL_ADDRESS || AS == AMDGPUAS::PRIVATE_ADDRESS)) { in canMergeStoresTo()
H A DAMDGPUAnnotateKernelFeatures.cpp81 return SrcAS == AMDGPUAS::LOCAL_ADDRESS || SrcAS == AMDGPUAS::PRIVATE_ADDRESS; in castRequiresQueuePtr()
H A DAMDGPU.h365 PRIVATE_ADDRESS = 5, ///< Address space for private memory. enumerator
H A DSIRegisterInfo.cpp665 return !TII->isLegalFLATOffset(FullOffset, AMDGPUAS::PRIVATE_ADDRESS, in needsFrameBaseReg()
749 assert(TII->isLegalFLATOffset(NewOffset, AMDGPUAS::PRIVATE_ADDRESS, in resolveFrameIndex()
781 return TII->isLegalFLATOffset(NewOffset, AMDGPUAS::PRIVATE_ADDRESS, in isFrameOffsetLegal()
1069 IsFlat ? TII->isLegalFLATOffset(MaxOffset, AMDGPUAS::PRIVATE_ADDRESS, in buildSpillLoadStore()
1636 if (TII->isLegalFLATOffset(NewOffset, AMDGPUAS::PRIVATE_ADDRESS, in eliminateFrameIndex()
H A DAMDGPUHSAMetadataStreamer.cpp97 case AMDGPUAS::PRIVATE_ADDRESS: in getAddressSpaceQualifier()
517 case AMDGPUAS::PRIVATE_ADDRESS: in getAddressSpaceQualifier()
H A DAMDGPUPromoteAlloca.cpp512 Type *VecPtrTy = VectorTy->getPointerTo(AMDGPUAS::PRIVATE_ADDRESS); in tryPromoteAllocaToVector()
533 Type *VecPtrTy = VectorTy->getPointerTo(AMDGPUAS::PRIVATE_ADDRESS); in tryPromoteAllocaToVector()
H A DAMDGPUCallLowering.cpp100 LLT::pointer(AMDGPUAS::PRIVATE_ADDRESS, 32), FI); in getStackAddress()
187 const LLT PtrTy = LLT::pointer(AMDGPUAS::PRIVATE_ADDRESS, 32); in getStackAddress()
H A DAMDGPULegalizerInfo.cpp239 case AMDGPUAS::PRIVATE_ADDRESS: in maxSizeForAddrSpace()
474 const LLT PrivatePtr = GetAddrSpacePtr(AMDGPUAS::PRIVATE_ADDRESS); in AMDGPULegalizerInfo()
1739 assert(AS == AMDGPUAS::LOCAL_ADDRESS || AS == AMDGPUAS::PRIVATE_ADDRESS); in getSegmentAperture()
1839 DestAS == AMDGPUAS::PRIVATE_ADDRESS); in legalizeAddrSpaceCast()
1856 if (SrcAS != AMDGPUAS::LOCAL_ADDRESS && SrcAS != AMDGPUAS::PRIVATE_ADDRESS) in legalizeAddrSpaceCast()
4817 return legalizeIsAddrSpace(MI, MRI, B, AMDGPUAS::PRIVATE_ADDRESS); in legalizeIntrinsic()
H A DSIISelLowering.cpp1353 } else if (AS == AMDGPUAS::PRIVATE_ADDRESS) { in isLegalAddressingMode()
1389 } else if (AS == AMDGPUAS::PRIVATE_ADDRESS) { in canMergeStoresTo()
1451 if (AddrSpace == AMDGPUAS::PRIVATE_ADDRESS) { in allowsMisalignedMemoryAccessesImpl()
1548 AS == AMDGPUAS::PRIVATE_ADDRESS; in isNonGlobalAddrSpace()
5319 DestAS == AMDGPUAS::PRIVATE_ADDRESS) { in lowerADDRSPACECAST()
5335 SrcAS == AMDGPUAS::PRIVATE_ADDRESS) { in lowerADDRSPACECAST()
5685 GSD->getAddressSpace() == AMDGPUAS::PRIVATE_ADDRESS) { in LowerGlobalAddress()
6694 AMDGPUAS::LOCAL_ADDRESS : AMDGPUAS::PRIVATE_ADDRESS; in LowerINTRINSIC_WO_CHAIN()
8090 AMDGPUAS::PRIVATE_ADDRESS : AMDGPUAS::GLOBAL_ADDRESS; in LowerLOAD()
8135 if (AS == AMDGPUAS::PRIVATE_ADDRESS) { in LowerLOAD()
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H A DAMDGPUISelDAGToDAG.cpp1533 AMDGPUTargetMachine::getNullPointerValue(AMDGPUAS::PRIVATE_ADDRESS); in SelectMUBUFScratchOffen()
1912 if (!TII->isLegalFLATOffset(COffsetVal, AMDGPUAS::PRIVATE_ADDRESS, in SelectScratchSAddr()
1916 COffsetVal, AMDGPUAS::PRIVATE_ADDRESS, SIInstrFlags::FlatScratch); in SelectScratchSAddr()
H A DAMDGPUTargetMachine.cpp656 AddrSpace == AMDGPUAS::PRIVATE_ADDRESS || in getNullPointerValue()
H A DSIMemoryLegalizer.cpp607 if (AS == AMDGPUAS::PRIVATE_ADDRESS) in toSIAtomicAddrSpace()
H A DR600InstrInfo.cpp1483 return AMDGPUAS::PRIVATE_ADDRESS; in getAddressSpaceForPseudoSourceKind()
H A DAMDGPULibCalls.cpp1342 if (PTy->getPointerAddressSpace() != AMDGPUAS::PRIVATE_ADDRESS) in fold_sincos()
H A DAMDGPUInstructionSelector.cpp3645 TII.isLegalFLATOffset(ConstOffset, AMDGPUAS::PRIVATE_ADDRESS, in selectScratchSAddr()
3709 Offset != TM.getNullPointerValue(AMDGPUAS::PRIVATE_ADDRESS)) { in selectMUBUFScratchOffen()
H A DSIInstrInfo.cpp2670 return AMDGPUAS::PRIVATE_ADDRESS; in getAddressSpaceForPseudoSourceKind()
7033 (*MI.memoperands_begin())->getAddrSpace() == AMDGPUAS::PRIVATE_ADDRESS); in isStackAccess()
H A DAMDGPURegisterBankInfo.cpp546 AS != AMDGPUAS::PRIVATE_ADDRESS) && in getInstrAlternativeMappings()