Searched refs:TempReg (Results 1 – 9 of 9) sorted by relevance
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
H A D | MipsFastISel.cpp | 430 DestReg = TempReg; in materializeGV() 1617 emitInst(Mips::OR, TempReg[2]).addReg(TempReg[0]).addReg(TempReg[1]); in fastLowerIntrinsicCall() 1639 emitInst(Mips::ANDi, TempReg[2]).addReg(TempReg[0]).addImm(0xFF00); in fastLowerIntrinsicCall() 1640 emitInst(Mips::OR, TempReg[3]).addReg(TempReg[1]).addReg(TempReg[2]); in fastLowerIntrinsicCall() 1643 emitInst(Mips::SLL, TempReg[5]).addReg(TempReg[4]).addImm(8); in fastLowerIntrinsicCall() 1646 emitInst(Mips::OR, TempReg[7]).addReg(TempReg[3]).addReg(TempReg[5]); in fastLowerIntrinsicCall() 1647 emitInst(Mips::OR, DestReg).addReg(TempReg[6]).addReg(TempReg[7]); in fastLowerIntrinsicCall() 1978 if (!TempReg) in selectShift() 1986 Op0Reg = TempReg; in selectShift() 2106 VReg = TempReg; in getRegEnsuringSimpleIntegerWidening() [all …]
|
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
H A D | PPCFrameLowering.cpp | 693 SingleScratchReg = ScratchReg == TempReg; in emitPrologue() 873 .addReg(TempReg, getKillRegState(true)) in emitPrologue() 913 .addReg(TempReg) in emitPrologue() 940 .addReg(TempReg, RegState::Kill) in emitPrologue() 944 .addReg(TempReg, RegState::Kill); in emitPrologue() 1298 .addReg(TempReg) in inlineStackProbe() 1331 Register TempReg) { in inlineStackProbe() argument 1400 .addReg(TempReg); in inlineStackProbe() 1412 .addReg(TempReg); in inlineStackProbe() 1437 Register TempReg = FPReg; in inlineStackProbe() local [all …]
|
H A D | PPCISelDAGToDAG.cpp | 451 Register TempReg = RegInfo->createVirtualRegister(&PPC::GPRCRegClass); in getGlobalBaseReg() local 454 .addReg(TempReg, RegState::Define).addReg(GlobalBaseReg); in getGlobalBaseReg()
|
H A D | PPCISelLowering.cpp | 11728 Register TempReg = MRI.createVirtualRegister(isPPC64 ? G8RC : GPRC); in emitProbedAlloca() local 11729 BuildMI(*MBB, {MI}, DL, TII->get(isPPC64 ? PPC::LIS8 : PPC::LIS), TempReg) in emitProbedAlloca() 11733 .addReg(TempReg) in emitProbedAlloca()
|
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUTargetMachine.cpp | 1264 Register TempReg; in parseMachineFunctionInfo() local 1265 if (parseNamedRegisterReference(PFS, TempReg, RegName.Value, Error)) { in parseMachineFunctionInfo() 1269 RegVal = TempReg; in parseMachineFunctionInfo()
|
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
H A D | ARMExpandPseudoInsts.cpp | 1588 Register TempReg = MI.getOperand(1).getReg(); in ExpandCMP_SWAP() local 1652 MIB = BuildMI(StoreBB, DL, TII->get(StrexOp), TempReg) in ExpandCMP_SWAP() 1661 .addReg(TempReg, RegState::Kill) in ExpandCMP_SWAP() 1716 Register TempReg = MI.getOperand(1).getReg(); in ExpandCMP_SWAP_64() local 1774 MIB = BuildMI(StoreBB, DL, TII->get(STREXD), TempReg); in ExpandCMP_SWAP_64() 1781 .addReg(TempReg, RegState::Kill) in ExpandCMP_SWAP_64()
|
H A D | ARMFastISel.cpp | 2965 Register TempReg = MF->getRegInfo().createVirtualRegister(&ARM::rGPRRegClass); in ARMLowerPICELF() local 2968 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), TempReg) in ARMLowerPICELF() 2981 .addReg(TempReg) in ARMLowerPICELF()
|
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/RISCV/AsmParser/ |
H A D | RISCVAsmParser.cpp | 2476 unsigned TempReg = Inst.getOperand(1).getReg(); in validateInstruction() local 2477 if (DestReg == TempReg) { in validateInstruction()
|
/netbsd/external/apache2/llvm/dist/llvm/utils/TableGen/ |
H A D | GlobalISelEmitter.cpp | 3590 unsigned TempReg);
|