| /netbsd/external/apache2/llvm/dist/llvm/docs/ |
| H A D | AMDGPUInstructionSyntax.rst | 125 Most *VOP1*, *VOP2* and *VOPC* instructions have several variants:
134 Native 32-bit encoding (*VOP1*, *VOP2* or *VOPC*) _e32
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| H A D | AMDGPUUsage.rst | 11563 For vector ALU instruction opcodes (VOP1, VOP2, VOP3, VOPC, VOP_DPP, VOP_SDWA),
11567 * _e32 for 32-bit VOP1/VOP2/VOPC
11572 VOP1/VOP2/VOP3/VOPC examples:
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrFormats.td | 28 field bit VOP1 = 0;
154 let TSFlags{7} = VOP1;
223 let hasExtraSrcRegAllocReq = !or(VOP1, VOP2, VOP3, VOPC, SDWA, VALU);
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| H A D | VOP1Instructions.td | 10 // VOP1 Classes
55 let VOP1 = 1;
159 // VOP1 Instructions
187 let VOP1 = 1;
859 let VOP1 = 1;
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| H A D | SIInstrInfo.td | 1430 !if (!eq(Src1.Value, untyped.Value), 1, // VOP1
1450 VOPDstOperand<VGPR_32>); // VOP1/2 32-bit dst
1593 dag ret = !if(!eq(NumSrcArgs, 1), (ins Src0RC:$src0), // VOP1
1606 // VOP1 without input operands (V_NOP, V_CLREXCP)
1611 // VOP1 with modifiers
1618 // VOP1 without modifiers
1717 // VOP1 without input operands (V_NOP)
1772 // VOP1 without input operands (V_NOP)
1775 // VOP1
1966 "$vdst"), // VOP1/2
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| H A D | SIInstrInfo.h | 412 return MI.getDesc().TSFlags & SIInstrFlags::VOP1; in isVOP1()
416 return get(Opcode).TSFlags & SIInstrFlags::VOP1; in isVOP1()
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| H A D | SIDefines.h | 32 VOP1 = 1 << 7, enumerator
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| H A D | VOPInstructions.td | 817 def VOP1InfoTable : VOPInfoTable<"VOP1">;
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| H A D | SIInstructions.td | 571 let VOP1 = 1;
796 // VOP1 Patterns
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUInstPrinter.cpp | 378 } else if (((Flags & SIInstrFlags::VOP1) && !getVOP1IsSingle(Opcode)) || in printVOPDst()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 3244 SIInstrFlags::VOP1 | SIInstrFlags::VOP2 | in validateConstantBusLimitations()
3785 const auto Enc = VOP1 | VOP2 | VOP3 | VOPC | VOP3P | SIInstrFlags::SDWA; in validateLdsDirect()
8085 cvtSDWA(Inst, Operands, SIInstrFlags::VOP1); in cvtSdwaVOP1()
8156 case SIInstrFlags::VOP1: in cvtSDWA()
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| /netbsd/external/apache2/llvm/dist/llvm/docs/AMDGPU/ |
| H A D | AMDGPUAsmGFX7.rst | 647 VOP1 section in Instructions
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| H A D | AMDGPUAsmGFX8.rst | 677 VOP1 section in Instructions
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| H A D | AMDGPUAsmGFX9.rst | 851 VOP1 section in Instructions
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| H A D | AMDGPUAsmGFX90a.rst | 752 VOP1 section in Instructions
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| H A D | AMDGPUAsmGFX10.rst | 1336 VOP1 section in Instructions
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