| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | VOPInstructions.td | 64 // Using complex patterns gives VOP3 patterns a very high complexity rating,
70 let VOP3 = 1;
72 let AsmVariantName = AMDGPUAsmVariants.VOP3;
111 // Using complex patterns gives VOP3 patterns a very high complexity rating,
117 let VOP3 = 1;
129 let AsmVariantName = AMDGPUAsmVariants.VOP3;
176 // XXX - Is there any reason to distinguish this from regular VOP3
819 def VOP3InfoTable : VOPInfoTable<"VOP3">;
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| H A D | SIInstrFormats.td | 31 field bit VOP3 = 0;
81 // This bit indicates that this is a VOP3 opcode which supports op_sel
157 let TSFlags{10} = VOP3;
223 let hasExtraSrcRegAllocReq = !or(VOP1, VOP2, VOP3, VOPC, SDWA, VALU);
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| H A D | SIDefines.h | 37 VOP3 = 1 << 10, enumerator
247 VOP3 = 1, enumerator
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| H A D | SIInstrInfo.td | 1432 3))); // VOP3
1506 // Returns the register class to use for sources of VOP3 instructions for the
1598 // Returns the input arguments for VOP3 instructions for the given SrcVT.
1643 // VOP3 with modifiers
1657 // VOP3 with modifiers except src2
1670 // VOP3 without modifiers
1842 // Returns the assembly string for the inputs and outputs of a VOP3
2009 0, // NumSrcArgs == 3 - No SDWA for VOP3
2026 0, // NumSrcArgs == 3 - No DPP for VOP3
2378 let ColFields = ["Size", "VOP3"];
[all …]
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| H A D | AMDGPU.td | 617 "Can use one literal in VOP3"
1115 string VOP3 = "VOP3";
1134 let Name = AMDGPUAsmVariants.VOP3;
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| H A D | SIInstrInfo.h | 428 return MI.getDesc().TSFlags & SIInstrFlags::VOP3; in isVOP3()
432 return get(Opcode).TSFlags & SIInstrFlags::VOP3; in isVOP3()
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| H A D | VOP2Instructions.td | 1224 // VOP3 only.
1235 // VOP3 carry-out.
1626 // are VOP2 on SI and VOP3 on VI.
1634 let AsmVariantName = AMDGPUAsmVariants.VOP3;
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| H A D | VOP3Instructions.td | 10 // VOP3 Classes
208 // VOP3 INTERP
273 // VOP3 Instructions
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| H A D | VOPCInstructions.td | 887 // Encoding used for VOPC instructions encoded as VOP3 differs from
1004 // Encoding used for VOPC instructions encoded as VOP3 differs from
1234 // Encoding used for VOPC instructions encoded as VOP3
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| H A D | SOPInstructions.td | 582 // TODO: b64 versions require VOP3 change since v_lshlrev_b64 is VOP3
607 // TODO: S_MUL_I32 require V_MUL_LO_I32 from VOP3 change
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| H A D | VOP3PInstructions.td | 52 // VOP3 neg/abs and VOP3P opsel/opsel_hi modifiers are allowed.
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| H A D | VOP1Instructions.td | 171 // TODO: Make profile for this, there is VOP3 encoding also
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| H A D | SIInstructions.td | 1623 // VOP3 Patterns
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| /netbsd/external/apache2/llvm/dist/llvm/docs/ |
| H A D | AMDGPUInstructionSyntax.rst | 126 they may also be encoded in *VOP3*, *DPP* and *SDWA* formats.
135 *VOP3* (64-bit) encoding _e64
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| H A D | AMDGPUInstructionNotation.rst | 71 :ref:`VOP3 operand modifiers<amdgpu_synid_vop3_operand_modifiers>` or
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| H A D | AMDGPUModifierSyntax.rst | 1422 VOP3 Modifiers
1524 VOP3 Operand Modifiers
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| H A D | AMDGPUUsage.rst | 11563 For vector ALU instruction opcodes (VOP1, VOP2, VOP3, VOPC, VOP_DPP, VOP_SDWA),
11568 * _e64 for 64-bit VOP3
11572 VOP1/VOP2/VOP3/VOPC examples:
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| /netbsd/external/apache2/llvm/dist/llvm/docs/AMDGPU/ |
| H A D | AMDGPUAsmGFX906.rst | 49 VOP3 section in Instructions
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| H A D | AMDGPUAsmGFX908.rst | 78 VOP3 section in Instructions
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| H A D | AMDGPUAsmGFX7.rst | 778 VOP3 section in Instructions
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| H A D | AMDGPUAsmGFX8.rst | 1025 VOP3 section in Instructions
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| H A D | AMDGPUAsmGFX9.rst | 1216 VOP3 section in Instructions
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 3056 if ((getForcedEncodingSize() == 32 && (TSFlags & SIInstrFlags::VOP3)) || in checkTargetMatchPredicate()
3057 (getForcedEncodingSize() == 64 && !(TSFlags & SIInstrFlags::VOP3)) || in checkTargetMatchPredicate()
3062 if ((TSFlags & SIInstrFlags::VOP3) && in checkTargetMatchPredicate()
3083 AMDGPUAsmVariants::DEFAULT, AMDGPUAsmVariants::VOP3, in getAllVariants()
3098 static const unsigned Variants[] = {AMDGPUAsmVariants::VOP3}; in getMatchedVariants()
3245 SIInstrFlags::VOP3 | SIInstrFlags::VOP3P | in validateConstantBusLimitations()
3785 const auto Enc = VOP1 | VOP2 | VOP3 | VOPC | VOP3P | SIInstrFlags::SDWA; in validateLdsDirect()
3981 if (!(Desc.TSFlags & (SIInstrFlags::VOP3 | SIInstrFlags::VOP3P))) in validateVOP3Literal()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUInstPrinter.cpp | 371 if (Flags & SIInstrFlags::VOP3) { in printVOPDst()
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| /netbsd/external/gpl3/gcc.old/dist/gcc/config/gcn/ |
| H A D | gcn.md | 1222 ; for this, so we use a custom VOP3 add with CC_SAVE_REG as a temp.
|