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Searched refs:VceLevel (Results 1 – 16 of 16) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
H A Damdgpu_vegam_smumgr.c1213 table->VceLevel[count].Frequency = mm_table->entries[count].eclk; in vegam_populate_smc_vce_level()
1214 table->VceLevel[count].MinVoltage = 0; in vegam_populate_smc_vce_level()
1215 table->VceLevel[count].MinVoltage |= in vegam_populate_smc_vce_level()
1227 table->VceLevel[count].MinVoltage |= in vegam_populate_smc_vce_level()
1229 table->VceLevel[count].MinVoltage |= 1 << PHASES_SHIFT; in vegam_populate_smc_vce_level()
1233 table->VceLevel[count].Frequency, &dividers); in vegam_populate_smc_vce_level()
1238 table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in vegam_populate_smc_vce_level()
1240 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].Frequency); in vegam_populate_smc_vce_level()
1241 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].MinVoltage); in vegam_populate_smc_vce_level()
H A Damdgpu_fiji_smumgr.c1440 table->VceLevel[count].Frequency = mm_table->entries[count].eclk; in fiji_populate_smc_vce_level()
1441 table->VceLevel[count].MinVoltage = 0; in fiji_populate_smc_vce_level()
1442 table->VceLevel[count].MinVoltage |= in fiji_populate_smc_vce_level()
1444 table->VceLevel[count].MinVoltage |= in fiji_populate_smc_vce_level()
1447 table->VceLevel[count].MinVoltage |= 1 << PHASES_SHIFT; in fiji_populate_smc_vce_level()
1451 table->VceLevel[count].Frequency, &dividers); in fiji_populate_smc_vce_level()
1456 table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in fiji_populate_smc_vce_level()
1458 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].Frequency); in fiji_populate_smc_vce_level()
1459 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].MinVoltage); in fiji_populate_smc_vce_level()
H A Damdgpu_polaris10_smumgr.c1308 table->VceLevel[count].Frequency = mm_table->entries[count].eclk; in polaris10_populate_smc_vce_level()
1309 table->VceLevel[count].MinVoltage = 0; in polaris10_populate_smc_vce_level()
1310 table->VceLevel[count].MinVoltage |= in polaris10_populate_smc_vce_level()
1322 table->VceLevel[count].MinVoltage |= in polaris10_populate_smc_vce_level()
1324 table->VceLevel[count].MinVoltage |= 1 << PHASES_SHIFT; in polaris10_populate_smc_vce_level()
1328 table->VceLevel[count].Frequency, &dividers); in polaris10_populate_smc_vce_level()
1333 table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in polaris10_populate_smc_vce_level()
1335 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].Frequency); in polaris10_populate_smc_vce_level()
1336 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].MinVoltage); in polaris10_populate_smc_vce_level()
H A Damdgpu_tonga_smumgr.c1389 table->VceLevel[count].Frequency = in tonga_populate_smc_vce_level()
1391 table->VceLevel[count].MinVoltage.Vddc = in tonga_populate_smc_vce_level()
1394 table->VceLevel[count].MinVoltage.VddGfx = in tonga_populate_smc_vce_level()
1398 table->VceLevel[count].MinVoltage.Vddci = in tonga_populate_smc_vce_level()
1401 table->VceLevel[count].MinVoltage.Phases = 1; in tonga_populate_smc_vce_level()
1405 table->VceLevel[count].Frequency, &dividers); in tonga_populate_smc_vce_level()
1410 table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in tonga_populate_smc_vce_level()
1412 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].Frequency); in tonga_populate_smc_vce_level()
H A Damdgpu_ci_smumgr.c1575 table->VceLevel[count].Frequency = vce_table->entries[count].evclk; in ci_populate_smc_vce_level()
1576 table->VceLevel[count].MinVoltage = in ci_populate_smc_vce_level()
1578 table->VceLevel[count].MinPhases = 1; in ci_populate_smc_vce_level()
1581 table->VceLevel[count].Frequency, &dividers); in ci_populate_smc_vce_level()
1586 table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in ci_populate_smc_vce_level()
1588 CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].Frequency); in ci_populate_smc_vce_level()
1589 CONVERT_FROM_HOST_TO_SMC_US(table->VceLevel[count].MinVoltage); in ci_populate_smc_vce_level()
/netbsd/sys/external/bsd/drm2/dist/drm/radeon/
H A Dsmu7_fusion.h238 SMU7_Fusion_ExtClkLevel VceLevel [SMU7_MAX_LEVELS_VCE]; member
H A Dsmu7_discrete.h330 SMU7_Discrete_ExtClkLevel VceLevel [SMU7_MAX_LEVELS_VCE]; member
H A Dradeon_ci_dpm.c2708 table->VceLevel[count].Frequency = in ci_populate_smc_vce_level()
2710 table->VceLevel[count].MinVoltage = in ci_populate_smc_vce_level()
2712 table->VceLevel[count].MinPhases = 1; in ci_populate_smc_vce_level()
2716 table->VceLevel[count].Frequency, false, &dividers); in ci_populate_smc_vce_level()
2720 table->VceLevel[count].Divider = (u8)dividers.post_divider; in ci_populate_smc_vce_level()
2722 table->VceLevel[count].Frequency = cpu_to_be32(table->VceLevel[count].Frequency); in ci_populate_smc_vce_level()
2723 table->VceLevel[count].MinVoltage = cpu_to_be16(table->VceLevel[count].MinVoltage); in ci_populate_smc_vce_level()
H A Dradeon_kv_dpm.c949 offsetof(SMU7_Fusion_DpmTable, VceLevel), in kv_populate_vce_table()
/netbsd/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/
H A Dsmu7_fusion.h238 SMU7_Fusion_ExtClkLevel VceLevel [SMU7_MAX_LEVELS_VCE]; member
H A Dsmu7_discrete.h331 SMU7_Discrete_ExtClkLevel VceLevel [SMU7_MAX_LEVELS_VCE]; member
H A Dsmu73_discrete.h257 SMU73_Discrete_ExtClkLevel VceLevel [SMU73_MAX_LEVELS_VCE]; member
H A Dsmu72_discrete.h273 SMU72_Discrete_ExtClkLevel VceLevel[SMU72_MAX_LEVELS_VCE]; member
H A Dsmu74_discrete.h289 SMU74_Discrete_ExtClkLevel VceLevel[SMU74_MAX_LEVELS_VCE]; member
H A Dsmu75_discrete.h295 SMU75_Discrete_ExtClkLevel VceLevel [SMU75_MAX_LEVELS_VCE]; member
/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_kv_dpm.c1032 offsetof(SMU7_Fusion_DpmTable, VceLevel), in kv_populate_vce_table()