Searched refs:cp_hdr (Results 1 – 7 of 7) sorted by relevance
465 const struct gfx_firmware_header_v1_0 *cp_hdr = NULL; in amdgpu_ucode_init_single_fw() local479 cp_hdr = (const struct gfx_firmware_header_v1_0 *)ucode->fw->data; in amdgpu_ucode_init_single_fw()502 le32_to_cpu(cp_hdr->jt_size) * 4; in amdgpu_ucode_init_single_fw()509 ucode->ucode_size = le32_to_cpu(cp_hdr->jt_size) * 4; in amdgpu_ucode_init_single_fw()513 le32_to_cpu(cp_hdr->jt_offset) * 4), in amdgpu_ucode_init_single_fw()631 const struct gfx_firmware_header_v1_0 *cp_hdr; in amdgpu_ucode_init_bo() local632 cp_hdr = (const struct gfx_firmware_header_v1_0 *)ucode->fw->data; in amdgpu_ucode_init_bo()635 fw_offset += ALIGN(le32_to_cpu(cp_hdr->jt_size) << 2, PAGE_SIZE); in amdgpu_ucode_init_bo()
663 const struct gfx_firmware_header_v1_0 *cp_hdr; in gfx_v10_0_init_microcode() local796 cp_hdr = (const struct gfx_firmware_header_v1_0 *) in gfx_v10_0_init_microcode()799 le32_to_cpu(cp_hdr->header.ucode_version); in gfx_v10_0_init_microcode()801 le32_to_cpu(cp_hdr->ucode_feature_version); in gfx_v10_0_init_microcode()883 le32_to_cpu(cp_hdr->jt_size) * 4, in gfx_v10_0_init_microcode()889 ALIGN(le32_to_cpu(cp_hdr->jt_size) * 4, in gfx_v10_0_init_microcode()2078 const struct gfx_firmware_header_v1_0 *cp_hdr; in gfx_v10_0_rlc_backdoor_autoload_copy_gfx_ucode() local2082 cp_hdr = (const struct gfx_firmware_header_v1_0 *) in gfx_v10_0_rlc_backdoor_autoload_copy_gfx_ucode()2092 cp_hdr = (const struct gfx_firmware_header_v1_0 *) in gfx_v10_0_rlc_backdoor_autoload_copy_gfx_ucode()2102 cp_hdr = (const struct gfx_firmware_header_v1_0 *) in gfx_v10_0_rlc_backdoor_autoload_copy_gfx_ucode()[all …]
1252 const struct gfx_firmware_header_v1_0 *cp_hdr; in gfx_v9_0_init_cp_gfx_microcode() local1273 adev->gfx.me_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); in gfx_v9_0_init_cp_gfx_microcode()1284 adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); in gfx_v9_0_init_cp_gfx_microcode()1463 const struct gfx_firmware_header_v1_0 *cp_hdr; in gfx_v9_0_init_cp_compute_microcode() local1483 cp_hdr = (const struct gfx_firmware_header_v1_0 *) in gfx_v9_0_init_cp_compute_microcode()1486 le32_to_cpu(cp_hdr->header.ucode_version); in gfx_v9_0_init_cp_compute_microcode()1488 le32_to_cpu(cp_hdr->ucode_feature_version); in gfx_v9_0_init_cp_compute_microcode()1499 cp_hdr = (const struct gfx_firmware_header_v1_0 *)info->fw->data; in gfx_v9_0_init_cp_compute_microcode()1507 ALIGN(le32_to_cpu(cp_hdr->jt_size) * 4, PAGE_SIZE); in gfx_v9_0_init_cp_compute_microcode()1514 cp_hdr = (const struct gfx_firmware_header_v1_0 *)info->fw->data; in gfx_v9_0_init_cp_compute_microcode()[all …]
321 const struct gfx_firmware_header_v1_0 *cp_hdr; in gfx_v6_0_init_microcode() local352 cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.pfp_fw->data; in gfx_v6_0_init_microcode()353 adev->gfx.pfp_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); in gfx_v6_0_init_microcode()354 adev->gfx.pfp_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); in gfx_v6_0_init_microcode()363 cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data; in gfx_v6_0_init_microcode()364 adev->gfx.me_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); in gfx_v6_0_init_microcode()365 adev->gfx.me_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); in gfx_v6_0_init_microcode()374 cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.ce_fw->data; in gfx_v6_0_init_microcode()375 adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); in gfx_v6_0_init_microcode()376 adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); in gfx_v6_0_init_microcode()
964 const struct gfx_firmware_header_v1_0 *cp_hdr; in gfx_v8_0_init_microcode() local1019 adev->gfx.pfp_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); in gfx_v8_0_init_microcode()1038 cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data; in gfx_v8_0_init_microcode()1039 adev->gfx.me_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); in gfx_v8_0_init_microcode()1059 cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.ce_fw->data; in gfx_v8_0_init_microcode()1060 adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); in gfx_v8_0_init_microcode()1140 adev->gfx.mec_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); in gfx_v8_0_init_microcode()1160 cp_hdr = (const struct gfx_firmware_header_v1_0 *) in gfx_v8_0_init_microcode()1163 le32_to_cpu(cp_hdr->header.ucode_version); in gfx_v8_0_init_microcode()1165 le32_to_cpu(cp_hdr->ucode_feature_version); in gfx_v8_0_init_microcode()[all …]
282 struct vmbus_chanpkt_hdr cp_hdr; member286 struct vmbus_chanpkt_hdr cp_hdr; member293 struct vmbus_chanpkt_hdr cp_hdr; member
1735 cp.cp_hdr.cph_type = type; in vmbus_channel_send()1736 cp.cp_hdr.cph_flags = flags; in vmbus_channel_send()1737 VMBUS_CHANPKT_SETLEN(cp.cp_hdr.cph_hlen, sizeof(cp)); in vmbus_channel_send()1738 VMBUS_CHANPKT_SETLEN(cp.cp_hdr.cph_tlen, pktlen_aligned); in vmbus_channel_send()1739 cp.cp_hdr.cph_tid = rid; in vmbus_channel_send()1774 cp.cp_hdr.cph_type = VMBUS_CHANPKT_TYPE_GPA; in vmbus_channel_send_sgl()1775 cp.cp_hdr.cph_flags = VMBUS_CHANPKT_FLAG_RC; in vmbus_channel_send_sgl()1778 cp.cp_hdr.cph_tid = rid; in vmbus_channel_send_sgl()1818 cp.cp_hdr.cph_type = VMBUS_CHANPKT_TYPE_GPA; in vmbus_channel_send_prpl()1819 cp.cp_hdr.cph_flags = VMBUS_CHANPKT_FLAG_RC; in vmbus_channel_send_prpl()[all …]