Searched refs:mmCGTS_CU3_SP1_CTRL_REG (Results 1 – 9 of 9) sorted by relevance
/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
H A D | amdgpu_mxgpu_vi.c | 193 mmCGTS_CU3_SP1_CTRL_REG, 0xffffffff, 0x00060005,
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H A D | amdgpu_gfx_v8_0.c | 287 mmCGTS_CU3_SP1_CTRL_REG, 0xffffffff, 0x00060005, 561 mmCGTS_CU3_SP1_CTRL_REG, 0xffffffff, 0x00060005, 657 mmCGTS_CU3_SP1_CTRL_REG, 0xffffffff, 0x00060005,
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/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/ |
H A D | gfx_7_0_d.h | 1505 #define mmCGTS_CU3_SP1_CTRL_REG 0xf01a macro
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H A D | gfx_7_2_d.h | 1526 #define mmCGTS_CU3_SP1_CTRL_REG 0xf01a macro
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H A D | gfx_8_0_d.h | 1719 #define mmCGTS_CU3_SP1_CTRL_REG 0xf01a macro
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H A D | gfx_8_1_d.h | 1687 #define mmCGTS_CU3_SP1_CTRL_REG 0xf01a macro
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/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/ |
H A D | gc_9_0_offset.h | 6346 #define mmCGTS_CU3_SP1_CTRL_REG … macro
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H A D | gc_9_2_1_offset.h | 6580 #define mmCGTS_CU3_SP1_CTRL_REG … macro
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H A D | gc_9_1_offset.h | 6568 #define mmCGTS_CU3_SP1_CTRL_REG … macro
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