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Searched refs:mmCP_HQD_PERSISTENT_STATE (Results 1 – 13 of 13) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/
H A Dpolaris10_pwrvirus.h1513 { 0x00005301, mmCP_HQD_PERSISTENT_STATE },
1523 { 0x00005301, mmCP_HQD_PERSISTENT_STATE },
1533 { 0x00005301, mmCP_HQD_PERSISTENT_STATE },
1543 { 0x00005301, mmCP_HQD_PERSISTENT_STATE },
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h573 #define mmCP_HQD_PERSISTENT_STATE 0x3249 macro
H A Dgfx_7_2_d.h586 #define mmCP_HQD_PERSISTENT_STATE 0x3249 macro
H A Dgfx_8_0_d.h636 #define mmCP_HQD_PERSISTENT_STATE 0x3249 macro
H A Dgfx_8_1_d.h636 #define mmCP_HQD_PERSISTENT_STATE 0x3249 macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_gfx_v9_0.c3446 tmp = RREG32_SOC15(GC, 0, mmCP_HQD_PERSISTENT_STATE); in gfx_v9_0_mqd_init()
3556 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PERSISTENT_STATE, in gfx_v9_0_kiq_init_register()
3598 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PERSISTENT_STATE, 0); in gfx_v9_0_kiq_fini_register()
H A Damdgpu_gfx_v10_0.c3338 tmp = RREG32_SOC15(GC, 0, mmCP_HQD_PERSISTENT_STATE); in gfx_v10_0_compute_mqd_init()
3449 WREG32_SOC15(GC, 0, mmCP_HQD_PERSISTENT_STATE, in gfx_v10_0_kiq_init_register()
H A Damdgpu_gfx_v7_0.c3039 mqd->cp_hqd_persistent_state = RREG32(mmCP_HQD_PERSISTENT_STATE); in gfx_v7_0_mqd_init()
H A Damdgpu_gfx_v8_0.c4534 tmp = RREG32(mmCP_HQD_PERSISTENT_STATE); in gfx_v8_0_mqd_init()
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2824 #define mmCP_HQD_PERSISTENT_STATE … macro
H A Dgc_9_2_1_offset.h3008 #define mmCP_HQD_PERSISTENT_STATE … macro
H A Dgc_9_1_offset.h3052 #define mmCP_HQD_PERSISTENT_STATE … macro
H A Dgc_10_1_0_offset.h5290 #define mmCP_HQD_PERSISTENT_STATE … macro