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Searched refs:mmDC_EDC_RESTORE_CNT (Results 1 – 6 of 6) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_1_offset.h133 #define mmDC_EDC_RESTORE_CNT … macro
H A Dgc_9_0_offset.h2652 #define mmDC_EDC_RESTORE_CNT … macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_gfx_v9_4.c52 { SOC15_REG_ENTRY(GC, 0, mmDC_EDC_RESTORE_CNT), 0, 1, 1 },
141 SOC15_REG_ENTRY(GC, 0, mmDC_EDC_RESTORE_CNT),
149 SOC15_REG_ENTRY(GC, 0, mmDC_EDC_RESTORE_CNT),
H A Damdgpu_gfx_v9_0.c4124 { SOC15_REG_ENTRY(GC, 0, mmDC_EDC_RESTORE_CNT), 0, 1, 1},
5677 { "DC_RESTORE", SOC15_REG_ENTRY(GC, 0, mmDC_EDC_RESTORE_CNT),
H A Damdgpu_gfx_v8_0.c1505 mmDC_EDC_RESTORE_CNT,
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_d.h2826 #define mmDC_EDC_RESTORE_CNT 0x3193 macro