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Searched refs:mmGDS_VMID10_BASE (Results 1 – 10 of 10) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h2229 #define mmGDS_VMID10_BASE 0x3314 macro
H A Dgfx_7_2_d.h2251 #define mmGDS_VMID10_BASE 0x3314 macro
H A Dgfx_8_0_d.h2449 #define mmGDS_VMID10_BASE 0x3314 macro
H A Dgfx_8_1_d.h2428 #define mmGDS_VMID10_BASE 0x3314 macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h3080 #define mmGDS_VMID10_BASE … macro
H A Dgc_9_2_1_offset.h3260 #define mmGDS_VMID10_BASE … macro
H A Dgc_9_1_offset.h3310 #define mmGDS_VMID10_BASE … macro
H A Dgc_10_1_0_offset.h5562 #define mmGDS_VMID10_BASE … macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_gfx_v7_0.c113 {mmGDS_VMID10_BASE, mmGDS_VMID10_SIZE, mmGDS_GWS_VMID10, mmGDS_OA_VMID10},
H A Damdgpu_gfx_v8_0.c196 {mmGDS_VMID10_BASE, mmGDS_VMID10_SIZE, mmGDS_GWS_VMID10, mmGDS_OA_VMID10},