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Searched refs:mmSPI_EDC_CNT (Results 1 – 9 of 9) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_gfx_v9_4.c63 { SOC15_REG_ENTRY(GC, 0, mmSPI_EDC_CNT), 0, 4, 1 },
198 { "SPI_SR_MEM", SOC15_REG_ENTRY(GC, 0, mmSPI_EDC_CNT),
201 { "SPI_GDS_EXPREQ", SOC15_REG_ENTRY(GC, 0, mmSPI_EDC_CNT),
204 { "SPI_WB_GRANT_30", SOC15_REG_ENTRY(GC, 0, mmSPI_EDC_CNT),
207 { "SPI_WB_GRANT_61", SOC15_REG_ENTRY(GC, 0, mmSPI_EDC_CNT),
210 { "SPI_LIFE_CNT", SOC15_REG_ENTRY(GC, 0, mmSPI_EDC_CNT),
H A Damdgpu_gfx_v9_0.c4129 { SOC15_REG_ENTRY(GC, 0, mmSPI_EDC_CNT), 0, 4, 1},
5727 { "SPI_SR_MEM", SOC15_REG_ENTRY(GC, 0, mmSPI_EDC_CNT),
H A Damdgpu_gfx_v8_0.c1510 mmSPI_EDC_CNT,
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_1_offset.h151 #define mmSPI_EDC_CNT … macro
H A Dgc_9_0_offset.h690 #define mmSPI_EDC_CNT … macro
H A Dgc_9_1_offset.h672 #define mmSPI_EDC_CNT … macro
H A Dgc_10_1_0_offset.h2594 #define mmSPI_EDC_CNT … macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_d.h1669 #define mmSPI_EDC_CNT 0x2444 macro
H A Dgfx_8_1_d.h1637 #define mmSPI_EDC_CNT 0x2444 macro