Home
last modified time | relevance | path

Searched refs:DAGB0_CNTL_MISC2__DISABLE_TLBWR_CG_MASK (Results 1 – 14 of 14) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Dmmhub_v2_0.c590 DAGB0_CNTL_MISC2__DISABLE_TLBWR_CG_MASK | in mmhub_v2_0_update_medium_grain_clock_gating()
600 DAGB0_CNTL_MISC2__DISABLE_TLBWR_CG_MASK | in mmhub_v2_0_update_medium_grain_clock_gating()
701 DAGB0_CNTL_MISC2__DISABLE_TLBWR_CG_MASK | in mmhub_v2_0_get_clockgating()
H A Dmmhub_v2_3.c506 DAGB0_CNTL_MISC2__DISABLE_TLBWR_CG_MASK | in mmhub_v2_3_update_medium_grain_clock_gating()
515 DAGB0_CNTL_MISC2__DISABLE_TLBWR_CG_MASK | in mmhub_v2_3_update_medium_grain_clock_gating()
600 DAGB0_CNTL_MISC2__DISABLE_TLBWR_CG_MASK | in mmhub_v2_3_get_clockgating()
H A Dmmhub_v1_0.c469 DAGB0_CNTL_MISC2__DISABLE_TLBWR_CG_MASK | in mmhub_v1_0_update_medium_grain_clock_gating()
486 DAGB0_CNTL_MISC2__DISABLE_TLBWR_CG_MASK | in mmhub_v1_0_update_medium_grain_clock_gating()
569 DAGB0_CNTL_MISC2__DISABLE_TLBWR_CG_MASK | in mmhub_v1_0_get_clockgating()
H A Dmmhub_v3_0.c564 DAGB0_CNTL_MISC2__DISABLE_TLBWR_CG_MASK | in mmhub_v3_0_update_medium_grain_clock_gating()
581 DAGB0_CNTL_MISC2__DISABLE_TLBWR_CG_MASK | in mmhub_v3_0_update_medium_grain_clock_gating()
H A Dmmhub_v1_7.c473 DAGB0_CNTL_MISC2__DISABLE_TLBWR_CG_MASK | in mmhub_v1_7_update_medium_grain_clock_gating()
489 DAGB0_CNTL_MISC2__DISABLE_TLBWR_CG_MASK | in mmhub_v1_7_update_medium_grain_clock_gating()
562 DAGB0_CNTL_MISC2__DISABLE_TLBWR_CG_MASK | in mmhub_v1_7_get_clockgating()
H A Dmmhub_v9_4.c592 DAGB0_CNTL_MISC2__DISABLE_TLBWR_CG_MASK | in mmhub_v9_4_update_medium_grain_clock_gating()
600 DAGB0_CNTL_MISC2__DISABLE_TLBWR_CG_MASK | in mmhub_v9_4_update_medium_grain_clock_gating()
675 DAGB0_CNTL_MISC2__DISABLE_TLBWR_CG_MASK | in mmhub_v9_4_get_clockgating()
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_2_0_0_sh_mask.h1816 #define DAGB0_CNTL_MISC2__DISABLE_TLBWR_CG_MASK … macro
H A Dmmhub_2_3_0_sh_mask.h2520 #define DAGB0_CNTL_MISC2__DISABLE_TLBWR_CG_MASK … macro
H A Dmmhub_9_1_sh_mask.h2453 #define DAGB0_CNTL_MISC2__DISABLE_TLBWR_CG_MASK … macro
H A Dmmhub_1_0_sh_mask.h1577 #define DAGB0_CNTL_MISC2__DISABLE_TLBWR_CG_MASK … macro
H A Dmmhub_9_3_0_sh_mask.h1577 #define DAGB0_CNTL_MISC2__DISABLE_TLBWR_CG_MASK … macro
H A Dmmhub_1_8_0_sh_mask.h1639 #define DAGB0_CNTL_MISC2__DISABLE_TLBWR_CG_MASK … macro
H A Dmmhub_1_7_sh_mask.h1663 #define DAGB0_CNTL_MISC2__DISABLE_TLBWR_CG_MASK … macro
H A Dmmhub_9_4_1_sh_mask.h1583 #define DAGB0_CNTL_MISC2__DISABLE_TLBWR_CG_MASK … macro