/openbsd/gnu/llvm/llvm/lib/Target/Hexagon/ |
H A D | HexagonRegisterInfo.td | 129 def R#i : Ri<i, "r"#i>, DwarfRegNum<[i]>; 131 def R29 : Ri<29, "r29", ["sp"]>, DwarfRegNum<[29]>; 156 def P0 : Rp<0, "p0">, DwarfRegNum<[63]>; 157 def P1 : Rp<1, "p1">, DwarfRegNum<[64]>; 158 def P2 : Rp<2, "p2">, DwarfRegNum<[65]>; 159 def P3 : Rp<3, "p3">, DwarfRegNum<[66]>; 228 def VTMP : Ri<0, "vtmp">, DwarfRegNum<[131]>; 283 def Q0 : Rq<0, "q0">, DwarfRegNum<[131]>; 284 def Q1 : Rq<1, "q1">, DwarfRegNum<[132]>; 285 def Q2 : Rq<2, "q2">, DwarfRegNum<[133]>; [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/LoongArch/ |
H A D | LoongArchRegisterInfo.td | 45 def R1 : LoongArchReg<1, "r1", ["ra"]>, DwarfRegNum<[1]>; 46 def R2 : LoongArchReg<2, "r2", ["tp"]>, DwarfRegNum<[2]>; 47 def R3 : LoongArchReg<3, "r3", ["sp"]>, DwarfRegNum<[3]>; 48 def R4 : LoongArchReg<4, "r4", ["a0"]>, DwarfRegNum<[4]>; 49 def R5 : LoongArchReg<5, "r5", ["a1"]>, DwarfRegNum<[5]>; 50 def R6 : LoongArchReg<6, "r6", ["a2"]>, DwarfRegNum<[6]>; 51 def R7 : LoongArchReg<7, "r7", ["a3"]>, DwarfRegNum<[7]>; 52 def R8 : LoongArchReg<8, "r8", ["a4"]>, DwarfRegNum<[8]>; 53 def R9 : LoongArchReg<9, "r9", ["a5"]>, DwarfRegNum<[9]>; 65 def R21 : LoongArchReg<21, "r21", [""]>, DwarfRegNum<[21]>; [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/CSKY/ |
H A D | CSKYRegisterInfo.td | 52 def R0 : CSKYReg<0, "r0", ["a0"]>, DwarfRegNum<[0]>; 53 def R1 : CSKYReg<1, "r1", ["a1"]>, DwarfRegNum<[1]>; 54 def R2 : CSKYReg<2, "r2", ["a2"]>, DwarfRegNum<[2]>; 55 def R3 : CSKYReg<3, "r3", ["a3"]>, DwarfRegNum<[3]>; 56 def R4 : CSKYReg<4, "r4", ["l0"]>, DwarfRegNum<[4]>; 57 def R5 : CSKYReg<5, "r5", ["l1"]>, DwarfRegNum<[5]>; 58 def R6 : CSKYReg<6, "r6", ["l2"]>, DwarfRegNum<[6]>; 59 def R7 : CSKYReg<7, "r7", ["l3"]>, DwarfRegNum<[7]>; 60 def R8 : CSKYReg<8, "r8", ["l4"]>, DwarfRegNum<[8]>; 61 def R9 : CSKYReg<9, "r9", ["l5"]>, DwarfRegNum<[9]>; [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/AVR/ |
H A D | AVRRegisterInfo.td | 36 def R0 : AVRReg<0, "r0">, DwarfRegNum<[0]>; 37 def R1 : AVRReg<1, "r1">, DwarfRegNum<[1]>; 38 def R2 : AVRReg<2, "r2">, DwarfRegNum<[2]>; 39 def R3 : AVRReg<3, "r3">, DwarfRegNum<[3]>; 40 def R4 : AVRReg<4, "r4">, DwarfRegNum<[4]>; 41 def R5 : AVRReg<5, "r5">, DwarfRegNum<[5]>; 42 def R6 : AVRReg<6, "r6">, DwarfRegNum<[6]>; 43 def R7 : AVRReg<7, "r7">, DwarfRegNum<[7]>; 44 def R8 : AVRReg<8, "r8">, DwarfRegNum<[8]>; 45 def R9 : AVRReg<9, "r9">, DwarfRegNum<[9]>; [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/Sparc/ |
H A D | SparcRegisterInfo.td | 129 def G0 : Ri< 0, "G0">, DwarfRegNum<[0]> { 132 def G1 : Ri< 1, "G1">, DwarfRegNum<[1]>; 133 def G2 : Ri< 2, "G2">, DwarfRegNum<[2]>; 134 def G3 : Ri< 3, "G3">, DwarfRegNum<[3]>; 135 def G4 : Ri< 4, "G4">, DwarfRegNum<[4]>; 136 def G5 : Ri< 5, "G5">, DwarfRegNum<[5]>; 137 def G6 : Ri< 6, "G6">, DwarfRegNum<[6]>; 138 def G7 : Ri< 7, "G7">, DwarfRegNum<[7]>; 139 def O0 : Ri< 8, "O0">, DwarfRegNum<[8]>; 140 def O1 : Ri< 9, "O1">, DwarfRegNum<[9]>; [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/XCore/ |
H A D | XCoreRegisterInfo.td | 25 def R0 : Ri< 0, "r0">, DwarfRegNum<[0]>; 26 def R1 : Ri< 1, "r1">, DwarfRegNum<[1]>; 27 def R2 : Ri< 2, "r2">, DwarfRegNum<[2]>; 28 def R3 : Ri< 3, "r3">, DwarfRegNum<[3]>; 29 def R4 : Ri< 4, "r4">, DwarfRegNum<[4]>; 30 def R5 : Ri< 5, "r5">, DwarfRegNum<[5]>; 31 def R6 : Ri< 6, "r6">, DwarfRegNum<[6]>; 32 def R7 : Ri< 7, "r7">, DwarfRegNum<[7]>; 33 def R8 : Ri< 8, "r8">, DwarfRegNum<[8]>; 34 def R9 : Ri< 9, "r9">, DwarfRegNum<[9]>; [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/Mips/ |
H A D | MipsRegisterInfo.td | 88 def ZERO : MipsGPRReg< 0, "zero">, DwarfRegNum<[0]>; 174 DwarfRegNum<[!add(I, 32)]>; 180 DwarfRegNum<[!add(I, 32)]>; 183 def HI0 : MipsReg<0, "ac0">, DwarfRegNum<[64]>; 184 def HI1 : MipsReg<1, "ac1">, DwarfRegNum<[176]>; 185 def HI2 : MipsReg<2, "ac2">, DwarfRegNum<[178]>; 186 def HI3 : MipsReg<3, "ac3">, DwarfRegNum<[180]>; 187 def LO0 : MipsReg<0, "ac0">, DwarfRegNum<[65]>; 188 def LO1 : MipsReg<1, "ac1">, DwarfRegNum<[177]>; 189 def LO2 : MipsReg<2, "ac2">, DwarfRegNum<[179]>; [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/Xtensa/ |
H A D | XtensaRegisterInfo.td | 35 def A0 : ARReg<0, "a0">, DwarfRegNum<[0]>; 41 def A2 : ARReg<2, "a2">, DwarfRegNum<[2]>; 42 def A3 : ARReg<3, "a3">, DwarfRegNum<[3]>; 43 def A4 : ARReg<4, "a4">, DwarfRegNum<[4]>; 44 def A5 : ARReg<5, "a5">, DwarfRegNum<[5]>; 45 def A6 : ARReg<6, "a6">, DwarfRegNum<[6]>; 46 def A7 : ARReg<7, "a7">, DwarfRegNum<[7]>; 49 def A8 : ARReg<8, "a8">, DwarfRegNum<[8]>; 51 def A9 : ARReg<9, "a9">, DwarfRegNum<[9]>; 52 def A10 : ARReg<10, "a10">, DwarfRegNum<[10]>; [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/RISCV/ |
H A D | RISCVRegisterInfo.td | 81 def X0 : RISCVReg<0, "x0", ["zero"]>, DwarfRegNum<[0]>; 83 def X1 : RISCVReg<1, "x1", ["ra"]>, DwarfRegNum<[1]>; 84 def X2 : RISCVReg<2, "x2", ["sp"]>, DwarfRegNum<[2]>; 85 def X3 : RISCVReg<3, "x3", ["gp"]>, DwarfRegNum<[3]>; 86 def X4 : RISCVReg<4, "x4", ["tp"]>, DwarfRegNum<[4]>; 87 def X5 : RISCVReg<5, "x5", ["t0"]>, DwarfRegNum<[5]>; 88 def X6 : RISCVReg<6, "x6", ["t1"]>, DwarfRegNum<[6]>; 89 def X7 : RISCVReg<7, "x7", ["t2"]>, DwarfRegNum<[7]>; 92 def X9 : RISCVReg<9, "x9", ["s1"]>, DwarfRegNum<[9]>; 218 DwarfRegNum<[!add(Index, 32)]>; [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/X86/ |
H A D | X86RegisterInfo.td | 187 def MM0 : X86Reg<"mm0", 0>, DwarfRegNum<[41, 29, 29]>; 188 def MM1 : X86Reg<"mm1", 1>, DwarfRegNum<[42, 30, 30]>; 189 def MM2 : X86Reg<"mm2", 2>, DwarfRegNum<[43, 31, 31]>; 190 def MM3 : X86Reg<"mm3", 3>, DwarfRegNum<[44, 32, 32]>; 191 def MM4 : X86Reg<"mm4", 4>, DwarfRegNum<[45, 33, 33]>; 192 def MM5 : X86Reg<"mm5", 5>, DwarfRegNum<[46, 34, 34]>; 193 def MM6 : X86Reg<"mm6", 6>, DwarfRegNum<[47, 35, 35]>; 194 def MM7 : X86Reg<"mm7", 7>, DwarfRegNum<[48, 36, 36]>; 207 def XMM0: X86Reg<"xmm0", 0>, DwarfRegNum<[17, 21, 21]>; 208 def XMM1: X86Reg<"xmm1", 1>, DwarfRegNum<[18, 22, 22]>; [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/ARC/ |
H A D | ARCRegisterInfo.td | 31 def R#i : Core<i, "%r"#i>, DwarfRegNum<[i]>; 35 def R#i : Core<i, "%r"#i>, DwarfRegNum<[i]>; 39 def R#i : Core<i, "%r"#i>, DwarfRegNum<[i]>; 44 def R#i : Core<i, "%r"#i>, DwarfRegNum<[i]>; 46 def GP : Core<26, "%gp",["%r26"]>, DwarfRegNum<[26]>; 47 def FP : Core<27, "%fp", ["%r27"]>, DwarfRegNum<[27]>; 48 def SP : Core<28, "%sp", ["%r28"]>, DwarfRegNum<[28]>; 49 def ILINK : Core<29, "%ilink">, DwarfRegNum<[29]>; 50 def R30 : Core<30, "%r30">, DwarfRegNum<[30]>; 51 def BLINK : Core<31, "%blink">, DwarfRegNum<[31]>; [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/PowerPC/ |
H A D | PPCRegisterInfoMMA.td | 36 def SPEACC: DwarfRegNum<[99, 111]>; 39 def ACC0 : ACC<0, "acc0", [VSRp0, VSRp1]>, DwarfRegNum<[-1, -1]>; 40 def ACC1 : ACC<1, "acc1", [VSRp2, VSRp3]>, DwarfRegNum<[-1, -1]>; 41 def ACC2 : ACC<2, "acc2", [VSRp4, VSRp5]>, DwarfRegNum<[-1, -1]>; 42 def ACC3 : ACC<3, "acc3", [VSRp6, VSRp7]>, DwarfRegNum<[-1, -1]>; 43 def ACC4 : ACC<4, "acc4", [VSRp8, VSRp9]>, DwarfRegNum<[-1, -1]>; 44 def ACC5 : ACC<5, "acc5", [VSRp10, VSRp11]>, DwarfRegNum<[-1, -1]>; 45 def ACC6 : ACC<6, "acc6", [VSRp12, VSRp13]>, DwarfRegNum<[-1, -1]>; 46 def ACC7 : ACC<7, "acc7", [VSRp14, VSRp15]>, DwarfRegNum<[-1, -1]>; 64 def UACC0 : UACC<0, "acc0", [VSRp0, VSRp1]>, DwarfRegNum<[-1, -1]>; [all …]
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H A D | PPCRegisterInfoDMR.td | 77 def DMRROW#Index : DMRROW<Index, "dmrrow"#Index>, DwarfRegNum<[-1, -1]>; 89 !cast<DMRROW>("DMRROW"#!add(!mul(Index, 2), 1))]>, DwarfRegNum<[-1, -1]>; 101 !cast<DMRROWp>("DMRROWp"#!add(!mul(Index, 4), 1))]>, DwarfRegNum<[-1, -1]>; 111 !cast<DMRROWp>("DMRROWp"#!add(!mul(Index, 4), 3))]>, DwarfRegNum<[-1, -1]>; 121 … "dmr"#Index, [!cast<WACC>("WACC"#Index), !cast<WACC_HI>("WACC_HI"#Index)]>, DwarfRegNum<[-1, -1]>; 130 def DMRp0 : DMRp<0, "dmrp0", [DMR0, DMR1]>, DwarfRegNum<[-1, -1]>; 131 def DMRp1 : DMRp<1, "dmrp1", [DMR2, DMR3]>, DwarfRegNum<[-1, -1]>; 132 def DMRp2 : DMRp<2, "dmrp2", [DMR4, DMR5]>, DwarfRegNum<[-1, -1]>; 133 def DMRp3 : DMRp<3, "dmrp3", [DMR6, DMR7]>, DwarfRegNum<[-1, -1]>;
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H A D | PPCRegisterInfo.td | 124 DwarfRegNum<[Index, -2]>; 170 DwarfRegNum<[-1, -1]>; 178 DwarfRegNum<[-1, -1]>; 248 def LR : SPR<8, "lr">, DwarfRegNum<[-2, 65]>; 250 def LR8 : SPR<8, "lr">, DwarfRegNum<[65, -2]>; 253 def CTR : SPR<9, "ctr">, DwarfRegNum<[-2, 66]>; 254 def CTR8 : SPR<9, "ctr">, DwarfRegNum<[66, -2]>; 257 def VRSAVE: SPR<256, "vrsave">, DwarfRegNum<[109]>; 260 def SPEFSCR: SPR<512, "spefscr">, DwarfRegNum<[612, 112]>; 262 def XER: SPR<1, "xer">, DwarfRegNum<[76]>; [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/AArch64/ |
H A D | AArch64RegisterInfo.td | 68 def W0 : AArch64Reg<0, "w0" >, DwarfRegNum<[0]>; 69 def W1 : AArch64Reg<1, "w1" >, DwarfRegNum<[1]>; 70 def W2 : AArch64Reg<2, "w2" >, DwarfRegNum<[2]>; 71 def W3 : AArch64Reg<3, "w3" >, DwarfRegNum<[3]>; 72 def W4 : AArch64Reg<4, "w4" >, DwarfRegNum<[4]>; 73 def W5 : AArch64Reg<5, "w5" >, DwarfRegNum<[5]>; 74 def W6 : AArch64Reg<6, "w6" >, DwarfRegNum<[6]>; 75 def W7 : AArch64Reg<7, "w7" >, DwarfRegNum<[7]>; 76 def W8 : AArch64Reg<8, "w8" >, DwarfRegNum<[8]>; 144 def FFR : AArch64Reg<0, "ffr">, DwarfRegNum<[47]>; [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/ARM/ |
H A D | ARMRegisterInfo.td | 79 def R0 : ARMReg< 0, "r0">, DwarfRegNum<[0]>; 80 def R1 : ARMReg< 1, "r1">, DwarfRegNum<[1]>; 81 def R2 : ARMReg< 2, "r2">, DwarfRegNum<[2]>; 82 def R3 : ARMReg< 3, "r3">, DwarfRegNum<[3]>; 83 def R4 : ARMReg< 4, "r4">, DwarfRegNum<[4]>; 84 def R5 : ARMReg< 5, "r5">, DwarfRegNum<[5]>; 85 def R6 : ARMReg< 6, "r6">, DwarfRegNum<[6]>; 86 def R7 : ARMReg< 7, "r7">, DwarfRegNum<[7]>; 89 def R8 : ARMReg< 8, "r8">, DwarfRegNum<[8]>; 90 def R9 : ARMReg< 9, "r9">, DwarfRegNum<[9]>; [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/VE/ |
H A D | VERegisterInfo.td | 105 def SW#I : VEReg<I, "sw"#I, [], ["s"#I]>, DwarfRegNum<[I]>; 112 DwarfRegNum<[I]>; 117 def SX8 : VEReg<8, "s8", [SW8, SF8], ["s8", "sl"]>, DwarfRegNum<[8]>; 118 def SX9 : VEReg<9, "s9", [SW9, SF9], ["s9", "fp"]>, DwarfRegNum<[9]>; 119 def SX10 : VEReg<10, "s10", [SW10, SF10], ["s10", "lr"]>, DwarfRegNum<[10]>; 120 def SX11 : VEReg<11, "s11", [SW11, SF11], ["s11", "sp"]>, DwarfRegNum<[11]>; 121 def SX14 : VEReg<14, "s14", [SW14, SF14], ["s14", "tp"]>, DwarfRegNum<[14]>; 128 ["s"#I]>, DwarfRegNum<[I]>; 145 def V#I : VEVecReg<I, "v"#I, [], ["v"#I]>, DwarfRegNum<[!add(64,I)]>; 152 def VM0 : VEMaskReg<0, "vm0", [], ["vm0"]>, DwarfRegNum<[128]>; [all …]
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/openbsd/gnu/llvm/llvm/lib/DebugInfo/DWARF/ |
H A D | DWARFExpression.cpp | 234 uint64_t DwarfRegNum; in prettyPrintRegisterOp() local 239 DwarfRegNum = Operands[OpNum++]; in prettyPrintRegisterOp() 241 DwarfRegNum = Opcode - DW_OP_breg0; in prettyPrintRegisterOp() 243 DwarfRegNum = Opcode - DW_OP_reg0; in prettyPrintRegisterOp() 416 uint64_t DwarfRegNum = Op.getRawOperand(0); in printCompactDWARFExpr() local 417 auto RegName = GetNameForDWARFReg(DwarfRegNum, false); in printCompactDWARFExpr() 425 int DwarfRegNum = Op.getRawOperand(0); in printCompactDWARFExpr() local 427 auto RegName = GetNameForDWARFReg(DwarfRegNum, false); in printCompactDWARFExpr() 461 uint64_t DwarfRegNum = Opcode - dwarf::DW_OP_reg0; in printCompactDWARFExpr() local 462 auto RegName = GetNameForDWARFReg(DwarfRegNum, false); in printCompactDWARFExpr() [all …]
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/openbsd/gnu/llvm/llvm/lib/CodeGen/ |
H A D | StackMaps.cpp | 266 unsigned DwarfRegNum = getDwarfRegNum(MOI->getReg(), TRI); in parseOperand() local 267 unsigned LLVMRegNum = *TRI->getLLVMRegNum(DwarfRegNum, false); in parseOperand() 273 DwarfRegNum, Offset); in parseOperand() 347 OS << "\t[encoding: .short " << LO.DwarfRegNum << ", .byte 0, .byte " in print() 357 unsigned DwarfRegNum = getDwarfRegNum(Reg, TRI); in createLiveOutReg() local 359 return LiveOutReg(Reg, DwarfRegNum, Size); in createLiveOutReg() 381 return LHS.DwarfRegNum < RHS.DwarfRegNum; in parseRegisterLiveOutMask() 386 if (I->DwarfRegNum != II->DwarfRegNum) { in parseRegisterLiveOutMask() 715 OS.emitInt16(LO.DwarfRegNum); in emitCallsiteEntries()
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/openbsd/gnu/llvm/llvm/include/llvm/CodeGen/ |
H A D | StackMaps.h | 282 unsigned short DwarfRegNum = 0; member 286 LiveOutReg(unsigned short Reg, unsigned short DwarfRegNum, in LiveOutReg() 288 : Reg(Reg), DwarfRegNum(DwarfRegNum), Size(Size) {} in LiveOutReg()
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/openbsd/gnu/llvm/llvm/lib/Target/BPF/ |
H A D | BPFRegisterInfo.td | 33 def W#I : Wi<I, "w"#I>, DwarfRegNum<[I]>; 35 def R#I : Ri<I, "r"#I, [!cast<Wi>("W"#I)]>, DwarfRegNum<[I]>;
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/openbsd/gnu/llvm/llvm/lib/Target/SystemZ/ |
H A D | SystemZRegisterInfo.td | 87 DwarfRegNum<[I]>; 228 DwarfRegNum<[!cast<DwarfMapping>("F"#I#"Dwarf").Id]>; 233 DwarfRegNum<[!cast<DwarfMapping>("F"#I#"Dwarf").Id]>; 262 DwarfRegNum<[!cast<DwarfMapping>("F"#I#"Dwarf").Id]>; 336 def A#I : ACR32<I, "a"#I>, DwarfRegNum<[!add(I, 48)]>; 346 def C#I : CREG64<I, "c"#I>, DwarfRegNum<[!add(I, 32)]>;
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/openbsd/gnu/llvm/llvm/utils/TableGen/ |
H A D | RegisterInfoEmitter.cpp | 401 for (auto &DwarfRegNum : DwarfRegNums) in EmitRegMappingTables() local 402 for (unsigned I = DwarfRegNum.second.size(), E = maxLength; I != E; ++I) in EmitRegMappingTables() 403 DwarfRegNum.second.push_back(-1); in EmitRegMappingTables() 422 for (auto &DwarfRegNum : DwarfRegNums) { in EmitRegMappingTables() local 423 int DwarfRegNo = DwarfRegNum.second[I]; in EmitRegMappingTables() 426 Dwarf2LMap[DwarfRegNo] = DwarfRegNum.first; in EmitRegMappingTables() 483 for (auto &DwarfRegNum : DwarfRegNums) { in EmitRegMappingTables() local 484 int RegNo = DwarfRegNum.second[i]; in EmitRegMappingTables() 488 OS << " { " << getQualifiedName(DwarfRegNum.first) << ", " << RegNo in EmitRegMappingTables()
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/openbsd/gnu/llvm/llvm/tools/llvm-objdump/ |
H A D | SourcePrinter.cpp | 46 auto GetRegName = [&MRI, &OS](uint64_t DwarfRegNum, bool IsEH) -> StringRef { in print() argument 48 MRI.getLLVMRegNum(DwarfRegNum, IsEH)) in print() 51 OS << "<unknown register " << DwarfRegNum << ">"; in print()
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/openbsd/gnu/llvm/llvm/lib/Target/Lanai/ |
H A D | LanaiRegisterInfo.td | 26 def R#i : LanaiReg<i, "r"#i>, DwarfRegNum<[i]>;
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