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Searched refs:LiveIn (Results 1 – 25 of 31) sorted by relevance

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/openbsd/gnu/llvm/llvm/tools/llvm-objdump/
H A DSourcePrinter.cpp168 ActiveCols[ColIdx].LiveIn = LV.liveAtAddress(ThisAddr); in update()
172 << ColIdx << ": LiveIn=" << ActiveCols[ColIdx].LiveIn in update()
175 if (!ActiveCols[ColIdx].LiveIn && !ActiveCols[ColIdx].LiveOut) in update()
187 bool LiveIn = LV.liveAtAddress(ThisAddr); in update() local
189 if (!LiveIn && !LiveOut) in update()
195 << ColIdx << ": LiveIn=" << LiveIn in update()
198 ActiveCols[ColIdx].LiveIn = LiveIn; in update()
248 (!AfterInst && ActiveCols[ColIdx].LiveIn)) in printAfterOtherLine()
304 if (ActiveCols[ColIdx2].isActive() && ActiveCols[ColIdx2].LiveIn) in printBetweenInsts()
335 else if (ActiveCols[ColIdx].LiveIn && ActiveCols[ColIdx].LiveOut) in printAfterInst()
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H A DSourcePrinter.h48 bool LiveIn = false; member
/openbsd/gnu/llvm/llvm/lib/Target/PowerPC/
H A DPPCMachineFunctionInfo.cpp63 for (const std::pair<Register, ISD::ArgFlagsTy> &LiveIn : LiveInAttrs) in isLiveInSExt() local
64 if (LiveIn.first == VReg) in isLiveInSExt()
65 return LiveIn.second.isSExt(); in isLiveInSExt()
70 for (const std::pair<Register, ISD::ArgFlagsTy> &LiveIn : LiveInAttrs) in isLiveInZExt() local
71 if (LiveIn.first == VReg) in isLiveInZExt()
72 return LiveIn.second.isZExt(); in isLiveInZExt()
/openbsd/gnu/llvm/llvm/lib/CodeGen/
H A DLiveRangeCalc.cpp59 LiveIn.clear(); in reset()
64 for (const LiveInBlock &I : LiveIn) { in updateFromLiveIns()
84 LiveIn.clear(); in updateFromLiveIns()
268 LiveIn.clear(); in findReachingDefs()
311 LiveIn.reserve(WorkList.size()); in findReachingDefs()
319 LiveIn.back().Kill = Use; in findReachingDefs()
337 for (LiveInBlock &I : LiveIn) { in updateSSA()
H A DRDFLiveness.cpp856 RefMap LiveIn; in computeLiveIns() local
857 traverse(&MF.front(), LiveIn); in computeLiveIns()
927 CopyLiveIns(B, LiveIn); in resetKills()
1020 dbgs() << " LiveIn: " << Print(LiveIn, DFG) << '\n'; in traverse()
1031 dbgs() << " LiveIn: " << Print(LiveIn, DFG) << '\n'; in traverse()
1042 RefMap LiveInCopy = LiveIn; in traverse()
1043 LiveIn.clear(); in traverse()
1111 emptify(LiveIn); in traverse()
1115 dbgs() << " LiveIn: " << Print(LiveIn, DFG) << '\n'; in traverse()
1130 LiveIn[RR.Reg].insert({D.Id,RR.Mask}); in traverse()
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H A DStackColoring.cpp424 BitVector LiveIn; member
578 dumpBV("LIVE_IN", BlockInfo.LiveIn); in dumpBB()
842 if (LocalLiveIn.test(BlockInfo.LiveIn)) { in calculateLocalLiveness()
844 BlockInfo.LiveIn |= LocalLiveIn; in calculateLocalLiveness()
872 for (int pos = MBBLiveness.LiveIn.find_first(); pos != -1; in calculateLiveIntervals()
873 pos = MBBLiveness.LiveIn.find_next(pos)) { in calculateLiveIntervals()
H A DAssignmentTrackingAnalysis.cpp320 DenseMap<const BasicBlock *, VarFragMap> LiveIn; member in __anon7ddb1d110211::MemLocFragmentFill
529 auto CurrentLiveInEntry = LiveIn.find(&BB); in meet()
531 if (CurrentLiveInEntry == LiveIn.end()) { in meet()
534 LiveIn[&BB] = std::move(BBLiveIn); in meet()
788 LiveIn.init(RPONumber); in run()
821 VarFragMap LiveSet = LiveIn[BB]; in run()
1780 auto CurrentLiveInEntry = LiveIn.find(&BB); in join()
1783 if (CurrentLiveInEntry == LiveIn.end() || in join()
1785 LiveIn[&BB] = std::move(BBLiveIn); in join()
1966 LiveIn.init(RPONumber); in run()
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H A DSplitKit.cpp238 BI.LiveIn = LVI->start <= Start; in calcLiveBlockInfo()
241 if (!BI.LiveIn) { in calcLiveBlockInfo()
268 BI.LiveIn = false; in calcLiveBlockInfo()
1584 if (BI.LiveIn && BI.LiveOut) in shouldSplitSingleBlock()
1734 assert(BI.LiveIn && "Must be live-in"); in splitRegInBlock()
1824 << (BI.LiveIn ? ", stack-in" : ", defined in block")); in splitRegOutBlock()
1832 if (!BI.LiveIn && (!EnterAfter || EnterAfter <= BI.FirstInstr)) { in splitRegOutBlock()
1881 << (LiveIn ? "live in" : "dead in") << ", " in print()
H A DMachineCSE.cpp723 auto LiveIn = PhysDefs.pop_back_val(); in ProcessBlockCSE() local
724 if (!MBB->isLiveIn(LiveIn.second)) in ProcessBlockCSE()
725 MBB->addLiveIn(LiveIn.second); in ProcessBlockCSE()
H A DRegAllocGreedy.cpp610 BC.Entry = BI.LiveIn ? SpillPlacement::PrefReg : SpillPlacement::DontCare; in addSplitConstraints()
624 if (BI.LiveIn) { in addSplitConstraints()
836 if (BI.LiveIn && BI.LiveOut && BI.FirstDef) in calcSpillCost()
860 if (BI.LiveIn) in calcGlobalSplitCost()
921 if (BI.LiveIn) { in splitAroundRegion()
1400 BI.LiveIn ? BI.FirstInstr.getBaseIndex() : BI.FirstInstr; in calcGapWeights()
1582 const bool LiveBefore = SplitBefore != 0 || BI.LiveIn; in tryLocalSplit()
1675 bool LiveBefore = BestBefore != 0 || BI.LiveIn; in tryLocalSplit()
H A DBranchRelaxation.cpp465 for (const MachineBasicBlock::RegisterMaskPair &LiveIn : Succ->liveins()) in fixupUnconditionalBranch() local
466 BranchBB->addLiveIn(LiveIn); in fixupUnconditionalBranch()
H A DRegisterPressure.cpp917 LaneBitmask LiveIn = Use.LaneMask & ~LiveMask; in advance() local
918 if (LiveIn.any()) { in advance()
919 discoverLiveIn(RegisterMaskPair(Reg, LiveIn)); in advance()
920 increaseRegPressure(Reg, LiveMask, LiveMask | LiveIn); in advance()
921 LiveRegs.insert(RegisterMaskPair(Reg, LiveIn)); in advance()
H A DMIRPrinter.cpp324 yaml::MachineFunctionLiveIn LiveIn; in convert() local
325 printRegMIR(LI.first, LiveIn.Register, TRI); in convert()
327 printRegMIR(LI.second, LiveIn.VirtualRegister, TRI); in convert()
328 MF.LiveIns.push_back(LiveIn); in convert()
H A DSplitKit.h126 bool LiveIn; ///< Current reg is live in. member
H A DMachineBasicBlock.cpp635 bool LiveIn = isLiveIn(PhysReg); in addLiveIn() local
641 if (LiveIn) in addLiveIn()
654 if (!LiveIn) in addLiveIn()
/openbsd/gnu/llvm/llvm/lib/Analysis/
H A DStackLifetime.cpp203 if (BitsIn.test(BlockInfo.LiveIn)) { in calculateLocalLiveness()
204 BlockInfo.LiveIn |= BitsIn; in calculateLocalLiveness()
238 BlockInfo.LiveIn.flip(); in calculateLocalLiveness()
259 if (BlockInfo.LiveIn.test(AllocaNo)) { in calculateLiveIntervals()
306 << ", livein " << BlockInfo.LiveIn << ", liveout " in dumpBlockLiveness()
/openbsd/gnu/llvm/llvm/include/llvm/CodeGen/
H A DLiveRangeCalc.h125 SmallVector<LiveInBlock, 16> LiveIn; variable
245 LiveIn.push_back(LiveInBlock(LR, DomNode, Kill));
H A DRDFLiveness.h161 void traverse(MachineBasicBlock *B, RefMap &LiveIn);
H A DMIRYamlMapping.h223 static void mapping(IO &YamlIO, MachineFunctionLiveIn &LiveIn) {
224 YamlIO.mapRequired("reg", LiveIn.Register);
226 "virtual-reg", LiveIn.VirtualRegister,
/openbsd/gnu/llvm/llvm/tools/llvm-exegesis/lib/
H A DSnippetRepetitor.cpp103 for (const auto &LiveIn : Entry.MBB->liveins()) in Repeat() local
104 Loop.MBB->addLiveIn(LiveIn); in Repeat()
/openbsd/gnu/llvm/llvm/include/llvm/Analysis/
H A DStackLifetime.h43 : Begin(Size), End(Size), LiveIn(Size), LiveOut(Size) {} in BlockLifetimeInfo()
52 BitVector LiveIn; member
/openbsd/gnu/llvm/llvm/lib/CodeGen/GlobalISel/
H A DUtils.cpp736 Register LiveIn = MRI.getLiveInVirtReg(PhysReg); in getFunctionLiveInPhysReg() local
737 if (LiveIn) { in getFunctionLiveInPhysReg()
738 MachineInstr *Def = MRI.getVRegDef(LiveIn); in getFunctionLiveInPhysReg()
742 return LiveIn; in getFunctionLiveInPhysReg()
750 LiveIn = MF.addLiveIn(PhysReg, &RC); in getFunctionLiveInPhysReg()
752 MRI.setType(LiveIn, RegTy); in getFunctionLiveInPhysReg()
755 BuildMI(EntryMBB, EntryMBB.begin(), DL, TII.get(TargetOpcode::COPY), LiveIn) in getFunctionLiveInPhysReg()
759 return LiveIn; in getFunctionLiveInPhysReg()
/openbsd/gnu/llvm/llvm/lib/CodeGen/LiveDebugValues/
H A DInstrRefBasedImpl.cpp2918 DbgValue &LiveIn) { in vlocJoin() argument
2972 if (LiveIn.Kind != DbgValue::VPHI || LiveIn.BlockNo != MBB.getNumber()) { in vlocJoin()
2973 Changed = LiveIn != FirstVal; in vlocJoin()
2975 LiveIn = FirstVal; in vlocJoin()
3015 Changed = LiveIn != FirstVal; in vlocJoin()
3017 LiveIn = FirstVal; in vlocJoin()
3022 Changed = LiveIn != VPHI; in vlocJoin()
3024 LiveIn = VPHI; in vlocJoin()
3242 if (LiveIn->Kind == DbgValue::VPHI && LiveIn->BlockNo == (int)CurBB) { in buildVLocValueMap()
3283 if (*LiveOut != *LiveIn) { in buildVLocValueMap()
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/openbsd/gnu/llvm/llvm/lib/CodeGen/MIRParser/
H A DMIRParser.cpp632 for (const auto &LiveIn : YamlMF.LiveIns) { in parseRegisterInfo() local
634 if (parseNamedRegisterReference(PFS, Reg, LiveIn.Register.Value, Error)) in parseRegisterInfo()
635 return error(Error, LiveIn.Register.SourceRange); in parseRegisterInfo()
637 if (!LiveIn.VirtualRegister.Value.empty()) { in parseRegisterInfo()
639 if (parseVirtualRegisterReference(PFS, Info, LiveIn.VirtualRegister.Value, in parseRegisterInfo()
641 return error(Error, LiveIn.VirtualRegister.SourceRange); in parseRegisterInfo()
/openbsd/gnu/llvm/llvm/lib/Transforms/Scalar/
H A DRewriteStatepointsForGC.cpp245 MapVector<BasicBlock *, SetVector<Value *>> LiveIn; member
3299 checkBasicSSA(DT, Data.LiveIn[&BB], BB.getTerminator()); in checkBasicSSA()
3320 Data.LiveIn[&BB] = Data.LiveSet[&BB]; in computeLiveInValues()
3321 Data.LiveIn[&BB].set_union(Data.LiveOut[&BB]); in computeLiveInValues()
3322 Data.LiveIn[&BB].set_subtract(Data.KillSet[&BB]); in computeLiveInValues()
3323 if (!Data.LiveIn[&BB].empty()) in computeLiveInValues()
3336 assert(Data.LiveIn.count(Succ)); in computeLiveInValues()
3337 LiveOut.set_union(Data.LiveIn[Succ]); in computeLiveInValues()
3353 assert(Data.LiveIn.count(BB)); in computeLiveInValues()
3354 const SetVector<Value *> &OldLiveIn = Data.LiveIn[BB]; in computeLiveInValues()
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