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Searched refs:RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK (Results 1 – 10 of 10) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Dgfx_v11_0.c4858 RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK; in gfx_v11_0_update_coarse_grain_clock_gating()
4914 data &= ~RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK; in gfx_v11_0_update_coarse_grain_clock_gating()
5115 if (data & RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK) in gfx_v11_0_get_clockgating_state()
H A Dgfx_v9_0.c4779 RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK; in gfx_v9_0_update_3d_clock_gating()
4799 data &= ~(RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK | in gfx_v9_0_update_3d_clock_gating()
5066 if (data & RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK) in gfx_v9_0_get_clockgating_state()
H A Dgfx_v10_0.c7624 RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK; in gfx_v10_0_update_3d_clock_gating()
7645 data &= ~RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK; in gfx_v10_0_update_3d_clock_gating()
8119 if (data & RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK) in gfx_v10_0_get_clockgating_state()
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h23749 #define RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK … macro
H A Dgc_9_1_sh_mask.h25040 #define RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK … macro
H A Dgc_9_2_1_sh_mask.h25103 #define RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK … macro
H A Dgc_11_0_0_sh_mask.h34855 #define RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK … macro
H A Dgc_10_1_0_sh_mask.h34150 #define RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK … macro
H A Dgc_11_0_3_sh_mask.h38150 #define RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK … macro
H A Dgc_10_3_0_sh_mask.h33208 #define RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK … macro