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Searched refs:UVD_CGC_CTRL__MPRD_MODE_MASK (Results 1 – 22 of 22) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h457 #define UVD_CGC_CTRL__MPRD_MODE_MASK macro
H A Duvd_3_1_sh_mask.h253 #define UVD_CGC_CTRL__MPRD_MODE_MASK 0x1000000 macro
H A Duvd_4_0_sh_mask.h52 #define UVD_CGC_CTRL__MPRD_MODE_MASK 0x01000000L macro
H A Duvd_4_2_sh_mask.h253 #define UVD_CGC_CTRL__MPRD_MODE_MASK 0x1000000 macro
H A Duvd_5_0_sh_mask.h275 #define UVD_CGC_CTRL__MPRD_MODE_MASK 0x1000000 macro
H A Duvd_6_0_sh_mask.h277 #define UVD_CGC_CTRL__MPRD_MODE_MASK 0x1000000 macro
/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Dvcn_v1_0.c525 | UVD_CGC_CTRL__MPRD_MODE_MASK in vcn_v1_0_disable_clock_gating()
625 | UVD_CGC_CTRL__MPRD_MODE_MASK in vcn_v1_0_enable_clock_gating()
683 UVD_CGC_CTRL__MPRD_MODE_MASK | in vcn_v1_0_clock_gating_dpg_mode()
H A Dvcn_v2_0.c544 | UVD_CGC_CTRL__MPRD_MODE_MASK in vcn_v2_0_disable_clock_gating()
620 UVD_CGC_CTRL__MPRD_MODE_MASK | in vcn_v2_0_clock_gating_dpg_mode()
681 | UVD_CGC_CTRL__MPRD_MODE_MASK in vcn_v2_0_enable_clock_gating()
H A Dvcn_v4_0.c715 | UVD_CGC_CTRL__MPRD_MODE_MASK in vcn_v4_0_disable_clock_gating()
800 UVD_CGC_CTRL__MPRD_MODE_MASK | in vcn_v4_0_disable_clock_gating_dpg_mode()
858 | UVD_CGC_CTRL__MPRD_MODE_MASK in vcn_v4_0_enable_clock_gating()
H A Dvcn_v2_5.c630 | UVD_CGC_CTRL__MPRD_MODE_MASK in vcn_v2_5_disable_clock_gating()
707 UVD_CGC_CTRL__MPRD_MODE_MASK | in vcn_v2_5_clock_gating_dpg_mode()
769 | UVD_CGC_CTRL__MPRD_MODE_MASK in vcn_v2_5_enable_clock_gating()
H A Duvd_v5_0.c704 UVD_CGC_CTRL__MPRD_MODE_MASK | in uvd_v5_0_set_sw_clock_gating()
H A Dvcn_v3_0.c752 | UVD_CGC_CTRL__MPRD_MODE_MASK in vcn_v3_0_disable_clock_gating()
851 UVD_CGC_CTRL__MPRD_MODE_MASK | in vcn_v3_0_clock_gating_dpg_mode()
910 | UVD_CGC_CTRL__MPRD_MODE_MASK in vcn_v3_0_enable_clock_gating()
H A Duvd_v6_0.c1361 UVD_CGC_CTRL__MPRD_MODE_MASK | in uvd_v6_0_set_sw_clock_gating()
H A Dvcn_v4_0_3.c646 UVD_CGC_CTRL__MPRD_MODE_MASK | in vcn_v4_0_3_disable_clock_gating_dpg_mode()
H A Duvd_v7_0.c1645 UVD_CGC_CTRL__MPRD_MODE_MASK |
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h950 #define UVD_CGC_CTRL__MPRD_MODE_MASK macro
H A Dvcn_2_5_sh_mask.h2018 #define UVD_CGC_CTRL__MPRD_MODE_MASK macro
H A Dvcn_2_0_0_sh_mask.h1969 #define UVD_CGC_CTRL__MPRD_MODE_MASK macro
H A Dvcn_2_6_0_sh_mask.h3689 #define UVD_CGC_CTRL__MPRD_MODE_MASK macro
H A Dvcn_3_0_0_sh_mask.h2748 #define UVD_CGC_CTRL__MPRD_MODE_MASK macro
H A Dvcn_4_0_0_sh_mask.h126 #define UVD_CGC_CTRL__MPRD_MODE_MASK macro
H A Dvcn_4_0_3_sh_mask.h126 #define UVD_CGC_CTRL__MPRD_MODE_MASK macro