Searched refs:UVD_MPC_SET_MUXA0__VARA_3__SHIFT (Results 1 – 19 of 19) sorted by relevance
601 #define UVD_MPC_SET_MUXA0__VARA_3__SHIFT … macro
484 #define UVD_MPC_SET_MUXA0__VARA_3__SHIFT 0x12 macro
503 #define UVD_MPC_SET_MUXA0__VARA_3__SHIFT 0x00000012 macro
488 #define UVD_MPC_SET_MUXA0__VARA_3__SHIFT 0x12 macro
520 #define UVD_MPC_SET_MUXA0__VARA_3__SHIFT 0x12 macro
522 #define UVD_MPC_SET_MUXA0__VARA_3__SHIFT 0x12 macro
1108 #define UVD_MPC_SET_MUXA0__VARA_3__SHIFT … macro
2849 #define UVD_MPC_SET_MUXA0__VARA_3__SHIFT … macro
2614 #define UVD_MPC_SET_MUXA0__VARA_3__SHIFT … macro
2841 #define UVD_MPC_SET_MUXA0__VARA_3__SHIFT … macro
3922 #define UVD_MPC_SET_MUXA0__VARA_3__SHIFT … macro
4172 #define UVD_MPC_SET_MUXA0__VARA_3__SHIFT … macro
4215 #define UVD_MPC_SET_MUXA0__VARA_3__SHIFT … macro
791 (0x3 << UVD_MPC_SET_MUXA0__VARA_3__SHIFT) | in vcn_v4_0_3_start_dpg_mode()1117 (0x3 << UVD_MPC_SET_MUXA0__VARA_3__SHIFT) | in vcn_v4_0_3_start()
839 (0x3 << UVD_MPC_SET_MUXA0__VARA_3__SHIFT) | in vcn_v1_0_start_spg_mode()1022 (0x3 << UVD_MPC_SET_MUXA0__VARA_3__SHIFT) | in vcn_v1_0_start_dpg_mode()
846 (0x3 << UVD_MPC_SET_MUXA0__VARA_3__SHIFT) | in vcn_v2_0_start_dpg_mode()979 (0x3 << UVD_MPC_SET_MUXA0__VARA_3__SHIFT) | in vcn_v2_0_start()
965 (0x3 << UVD_MPC_SET_MUXA0__VARA_3__SHIFT) | in vcn_v4_0_start_dpg_mode()1104 (0x3 << UVD_MPC_SET_MUXA0__VARA_3__SHIFT) | in vcn_v4_0_start()
871 (0x3 << UVD_MPC_SET_MUXA0__VARA_3__SHIFT) | in vcn_v2_5_start_dpg_mode()1025 (0x3 << UVD_MPC_SET_MUXA0__VARA_3__SHIFT) | in vcn_v2_5_start()
994 (0x3 << UVD_MPC_SET_MUXA0__VARA_3__SHIFT) | in vcn_v3_0_start_dpg_mode()1158 (0x3 << UVD_MPC_SET_MUXA0__VARA_3__SHIFT) | in vcn_v3_0_start()